LAN9303-ABZJ SMSC, LAN9303-ABZJ Datasheet - Page 367

• Manufacturer Part Number: LAN9303-ABZJ
• Description: IC ETHER SW 3PORT 16BIT 56QFN
• Manufacturer: SMSC

Specifications of LAN9303-ABZJ

• Controller Type: Ethernet Switch Controller
• Interface: SMBus (2-Wire/I²C)
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 190mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 56-QFN
• Product: Ethernet Switches
• Standard Supported: Yes
• Data Rate: 10 Mbps/100 Mbps
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3 V
• Supply Current (max): 0.19 A (Typ)
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• For Use With: 638-1095 - EVALUATION BOARD FOR LAN9303
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 638-1082

Small Form Factor Three Port 10/100 Managed Ethernet Switch with Single MII/RMII/Turbo MII
Datasheet
Chapter 16 Datasheet Revision History
SMSC LAN9303/LAN9303i
REVISION LEVEL & DATE
Rev. 1.4 (07-07-10)
Rev. 1.3 (08-27-09)
Rev. 1.2 (12-19-08)
Table 3.6, “Serial
Management/EEPROM
Pins,” on page 38
Section 13.4.2.23, "Port x
MAC Transmit Configuration
Register
(MAC_TX_CFG_x)," on
page 249
Section 13.4.3.10, "Switch
Engine VLAN Read Data
Register
(SWE_VLAN_RD_DATA),"
on page 283
Table 7.2, “4B/5B Code
Table,” on page 91
Section 1.1, "General
Terms," on page 13
Table 6.1, “Switch Fabric
Flow Control Enable Logic,”
on page 63
Section 13.2.6.4, "Virtual
PHY Identification LSB
Register (VPHY_ID_LSB),"
on page
13.3.2.4, "Port x PHY
Identification LSB Register
(PHY_ID_LSB_x)," on
page 198
Figure 14.2 nRST Reset Pin
Timing on page 351
Section 14.5, "AC
Specifications," on page 350
Section 14.1, "Absolute
Maximum Ratings*," on
page 346
Section 14.3, "Power
Consumption," on page 347
SECTION/FIGURE/ENTRY
Table 16.1 Customer Revision History
175,
and Cover
Section
DATASHEET
367
Added note to EE_SDA/SDA and EE_SCL/SCL
pin descriptions stating “This pin must be pulled-up
by an external resistor at all times.”
Added note to IFG Config bit: “IFG Config values
less than 15 are unsupported.”
Updated field descriptions for Port Default VID and
Prioroty, bits 16 and 11:0 to match those of the
SWE_VLAN_WR_DATA register.
Corrected typo in 10001 code group receiver
interpretation. “J” changed to “/J/”.
Added 10BASE-T and 100BASE-TX definitions to
general terms list, replacing “100BT”.
Corrected typo in last column title. “RX FLOW
CONTROL ENABLE” changed to “TX FLOW
CONTROL ENABLE”
Clarified default values using binary.
Updated diagram with correct shading.
Added MII, RMII, and SMI timing diagrams and
specifications.
Added ESD rating information
Added power consumption information
Initial Release
CORRECTION
Revision 1.4 (07-07-10)