LAN9303-ABZJ SMSC, LAN9303-ABZJ Datasheet - Page 107

• Manufacturer Part Number: LAN9303-ABZJ
• Description: IC ETHER SW 3PORT 16BIT 56QFN
• Manufacturer: SMSC

Specifications of LAN9303-ABZJ

• Controller Type: Ethernet Switch Controller
• Interface: SMBus (2-Wire/I²C)
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 190mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 56-QFN
• Product: Ethernet Switches
• Standard Supported: Yes
• Data Rate: 10 Mbps/100 Mbps
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3 V
• Supply Current (max): 0.19 A (Typ)
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• For Use With: 638-1095 - EVALUATION BOARD FOR LAN9303
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 638-1082

Small Form Factor Three Port 10/100 Managed Ethernet Switch with Single MII/RMII/Turbo MII
Datasheet
SMSC LAN9303/LAN9303i
8.3
eeprom_size_strap
EE_SDA
EE_SCL
0
1
Figure 8.1
The I
Note: When the EEPROM Loader is running, it has exclusive use of the I
The I
transmission and reception, acknowledge generation and reception) for connection to I2C EEPROMs,
and consists of a data wire (EE_SDA) and a serial clock (EE_SCL). The serial clock is driven by the
master, while the data wire is bi-directional. Both signals are open-drain and require external pull-
upresistors.
The I
I
Based on the
varying size ranges are supported by additional bits in the
(EPC_ADDRESS)
largest EEPROM uses all the address bits, while the smaller EEPROMs treat the upper address bits
as don’t cares. The EEPROM controller drives all the address bits as requested regardless of the
actual size of the EEPROM. The supported size ranges for I
Note 8.1
I
2
2
Start Condition
C-Bus Specification . Refer to the he NXP I
C Master EEPROM Controller
2
2
2
C master interface runs at the standard-mode rate of 100KHz and is fully compliant with the NXP
C EEPROM controller supports I
C master implements a low level serial interface (start and stop condition generation, data bit
S
Refer to
displays the various bus states of a typical I
Bits in the control byte are used as the upper address bits.
eeprom_size_strap
change
# OF ADDRESS BYTES
Section 8.4, "EEPROM Loader"
data
can
field of the
1
Data Valid
(Note
or Ack
stable
Table 8.1 I
data
2
EEPROM Command Register
8.1)
change
Figure 8.1 I
configuration strap, various sized I
data
can
DATASHEET
2
C EEPROM Size Ranges
2
C compatible EEPROMs.
Condition
Re-Start
107
4096 x 8 through 65536 x 8
Sr
2
16 x 8 through 2048 x 8
2
C-Bus Specification for detailed timing information.
C Cycle
for more information.
EEPROM SIZE
change
data
can
2
C cycle.
Data Valid
(E2P_CMD). Within each size range, the
2
or Ack
C operation are shown in
stable
data
2
C EEPROMs are supported. The
EEPROM Controller Address
change
data
can
24xx32, 24xx64, 24xx128,
24xx00, 24xx01, 24xx02,
24xx04, 24xx08, 24xx16
24xx256, 24xx512
2
EEPROM TYPES
C EEPROM controller.
Stop Condition
Revision 1.4 (07-07-10)
P
Table
8.1.