ISP1583BSUM ST-Ericsson Inc, ISP1583BSUM Datasheet - Page 30

• Manufacturer Part Number: ISP1583BSUM
• Description: IC USB PERIPH CONTROLLER 64HVQFN
• Manufacturer: ST-Ericsson Inc

Specifications of ISP1583BSUM

• Controller Type: USB Peripheral Controller
• Interface: Parallel/Serial
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 47mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-VQFN Exposed Pad, 64-HVQFN, 64-SQFN, 64-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-1886-2; ISP1583BS,518; ISP1583BS-T

NXP Semiconductors
9. Register description
Table 21.
ISP1583_7
Product data sheet
Name
Initialization registers
Address
Mode
Interrupt Configuration
OTG
Interrupt Enable
Data flow registers
Endpoint Index
Control Function
Data Port
Buffer Length
Buffer Status
Endpoint MaxPacketSize
Endpoint Type
DMA registers
DMA Command
DMA Transfer Counter
DMA Configuration
DMA Hardware
Register overview
Destination
device
device
device
device
device
endpoints
endpoint
endpoint
endpoint
endpoint
endpoint
endpoint
DMA controller
DMA controller
DMA controller
DMA controller
Rev. 07 — 22 September 2008
Address Description
00h
0Ch
10h
12h
14h
2Ch
28h
20h
1Ch
1Eh
04h
08h
30h
34h
38h
39h
3Ch
USB device address and enable
power-down options, global interrupt
enable, SoftConnect
interrupt sources, trigger mode,
output polarity
OTG implementation
interrupt source enabling
endpoint selection, data flow direction 1
endpoint buffer management
data access to endpoint FIFO
packet size counter
buffer status for each endpoint
maximum packet size
selects endpoint type: isochronous,
bulk or interrupt
controls all DMA transfers
sets byte count for DMA transfer
byte 0: sets GDMA configuration
(counter enable, data strobing, bus
width)
byte 1: sets ATA configuration (IORDY
enable, mode selection: ATA, MDMA,
PIO)
endian type, master or slave
selection, signal polarity for DACK,
DREQ, DIOW, DIOR, EOT
Hi-Speed USB peripheral controller
Size
(bytes)
1
2
1
1
4
1
2
2
1
2
2
1
4
1
1
1
© NXP B.V. 2008. All rights reserved.
ISP1583
Reference
Section 9.2.1
on page 31
Section 9.2.2
on page 31
Section 9.2.3
on page 33
Section 9.2.4
on page 34
Section 9.2.5
on page 36
Section 9.3.1
on page 38
Section 9.3.2
on page 39
Section 9.3.3
on page 40
Section 9.3.4
on page 41
Section 9.3.5
on page 42
Section 9.3.6
on page 43
Section 9.3.7
on page 44
Section 9.4.1
on page 47
Section 9.4.2
on page 49
Section 9.4.3
on page 50
Section 9.4.4
on page 52
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