ISP1583BSUM ST-Ericsson Inc, ISP1583BSUM Datasheet - Page 9

• Manufacturer Part Number: ISP1583BSUM
• Description: IC USB PERIPH CONTROLLER 64HVQFN
• Manufacturer: ST-Ericsson Inc

Specifications of ISP1583BSUM

• Controller Type: USB Peripheral Controller
• Interface: Parallel/Serial
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 47mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-VQFN Exposed Pad, 64-HVQFN, 64-SQFN, 64-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-1886-2; ISP1583BS,518; ISP1583BS-T

NXP Semiconductors
Table 3.
ISP1583_7
Product data sheet
Symbol
RW_N/
RD_N
DS_N/
WR_N
CS0_N
CS1_N
AD0
AD1
AD2
V
AD3
AD4
AD5
AD6
AD7
VCC1V8
n.c.
CC(I/O)
[3]
[3]
[4]
[1]
[4]
Pin description
Pin
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
ISP1583BS ISP1583ET;
ISP1583ET2
J3
K3
J4
K4
K5
J5
K6
J6
K7
J7
K8
J8
K9
K10
-
…continued
ISP1583ET1
F3
H3
G3
F4
G4
H4
F5
E5
H5
G5
G6
H6
H7
H8
-
Rev. 07 — 22 September 2008
Type
I
I
O
O
I/O
I/O
I/O
-
I/O
I/O
I/O
I/O
I/O
-
-
[2]
Description
Read or write input — For the Freescale mode, this
function is determined by pin MODE0 = LOW during
power-up.
Read input — For the 8051 mode, this function is
determined by pin MODE0 = HIGH during power-up.
input pad; TTL; 5 V tolerant
Data selection input — For the Freescale mode, this
function is determined by pin MODE0 = LOW at power-up.
Write input — For the 8051 mode, this function is
determined by pin MODE0 = HIGH at power-up.
input pad; TTL; 5 V tolerant
chip selection output 0 for the ATA/ATAPI device; see
Table 61
CMOS output; 8 mA drive
chip selection output 1 for the ATA/ATAPI device; see
Table 61
CMOS output; 8 mA drive
bit 0 of the multiplexed address and data
bidirectional pad; 4 ns slew-rate control; TTL; 5 V tolerant
bit 1 of the multiplexed address and data bus
bidirectional pad; 4 ns slew-rate control; TTL; 5 V tolerant
bit 2 of the multiplexed address and data bus
bidirectional pad; 4 ns slew-rate control; TTL; 5 V tolerant
I/O pad supply voltage (1.65 V to 3.6 V); see
bit 3 of the multiplexed address and data bus
bidirectional pad; 4 ns slew-rate control; TTL; 5 V tolerant
bit 4 of the multiplexed address and data bus
bidirectional pad; 4 ns slew-rate control; TTL; 5 V tolerant
bit 5 of the multiplexed address and data bus
bidirectional pad; 4 ns slew-rate control; TTL; 5 V tolerant
bit 6 of the multiplexed address and data bus
bidirectional pad; 4 ns slew-rate control; TTL; 5 V tolerant
bit 7 of the multiplexed address and data bus
bidirectional pad; 4 ns slew-rate control; TTL; 5 V tolerant
voltage regulator output (1.8 V
voltage from the internal regulator; this regulated voltage
cannot drive external devices; decouple this pin using a
0.1 F capacitor; see
not connected
Hi-Speed USB peripheral controller
Section 8.16
0.15 V); tapped out
© NXP B.V. 2008. All rights reserved.
ISP1583
Section 8.16
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