ISP1583BSUM ST-Ericsson Inc, ISP1583BSUM Datasheet - Page 80

IC USB PERIPH CONTROLLER 64HVQFN

ISP1583BSUM

Manufacturer Part Number
ISP1583BSUM
Description
IC USB PERIPH CONTROLLER 64HVQFN
Manufacturer
ST-Ericsson Inc
Datasheet

Specifications of ISP1583BSUM

Controller Type
USB Peripheral Controller
Interface
Parallel/Serial
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
47mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
64-VQFN Exposed Pad, 64-HVQFN, 64-SQFN, 64-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-1886-2
ISP1583BS,518
ISP1583BS-T

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ISP1583BSUM
Manufacturer:
MICRON
Quantity:
2 000
Part Number:
ISP1583BSUM
Manufacturer:
ST-ERICS
Quantity:
829
Part Number:
ISP1583BSUM
Manufacturer:
ST
0
Part Number:
ISP1583BSUM
Manufacturer:
STE
Quantity:
20 000
NXP Semiconductors
Table 108. PIO mode timing parameters
V
[1]
[2]
[3]
ISP1583_7
Product data sheet
Symbol Parameter
T
t
t
t
t
t
t
t
t
t
t
t
t
su1(min)
w1(min)
w2(min)
su2(min)
h2(min)
su3(min)
h3(min)
d2(max)
h1(min)
su4(min)
su5(min)
w3(max)
CC(I/O)
cy1(min)
T
Minimum timing requirements for T
implementation must lengthen t
data. A device implementation shall support any legal host implementation.
t
If READY/IORDY is LOW at t
must be met for reading (t
d2
cy1
specifies the time after DIOR is negated, when the data bus is no longer driven by the device (3-state).
= 1.65 V to 3.6 V; V
is the total cycle time, consisting of command active time t
read or write cycle time
address to DIOR or DIOW on set-up
time
DIOR or DIOW pulse width
DIOR/DIOW recovery time
data set-up time before DIOW off
data hold time after DIOW off
data set-up time before DIOR on
data hold time after DIOR off
data to 3-state delay after DIOR off
address hold time after DIOR or DIOW
off
READY/IORDY after DIOR or DIOW on
set-up time
read data to READY/IORDY HIGH
set-up time
READY/IORDY LOW pulse width
13.2.1 PIO mode
13.2 DMA timing
Remark: In the following subsections, RW_N/RD_N, DS_N/WR_N, READY/IORDY and
ALE/A0 refer to the ISP1583 pin.
CC(3V3)
su3
su4
does not apply). When READY/IORDY is HIGH at t
w1
, the host waits until READY/IORDY is made HIGH before the PIO cycle is completed. In that case, t
= 3.3 V; V
and/or t
cy1
, t
w1
w2
and t
to ensure that T
GND
w2
Rev. 07 — 22 September 2008
must all be met. As T
= 0 V; T
Conditions
amb
cy1
w1
= 40 C to +85 C; unless otherwise specified.
is equal to or greater than the value reported in the IDENTIFY DEVICE
and command recovery (inactive) time t
cy1(min)
[1]
[1]
[1]
[2]
[3]
[3]
Mode 0 Mode 1 Mode 2 Mode 3 Mode 4 Unit
600
70
165
-
60
30
50
5
30
20
35
0
1250
is greater than the sum of t
su4
, t
su3
383
50
125
-
45
20
35
5
30
15
35
0
1250
Hi-Speed USB peripheral controller
must be met for reading (t
240
30
100
-
30
15
20
5
30
10
35
0
1250
w2
w1(min)
, that is, T
180
30
80
70
30
10
20
5
30
10
35
0
1250
© NXP B.V. 2008. All rights reserved.
and t
ISP1583
su5
w2(min)
cy1
does not apply).
120
25
70
25
20
10
20
5
30
10
35
0
1250
= t
w1
, a host
+ t
79 of 99
w2
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
.
su5

Related parts for ISP1583BSUM