MC68EC040FE25A Freescale Semiconductor, MC68EC040FE25A Datasheet - Page 267

• Manufacturer Part Number: MC68EC040FE25A
• Description: IC MPU 32BIT 25MHZ 184-CQFP
• Manufacturer: Freescale Semiconductor
• Series: M68000r

Specifications of MC68EC040FE25A

• Processor Type: M680x0 32-Bit
• Speed: 25MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 184-CQFP
• Core Size: 32bit
• Program Memory Size: 8KB
• Cpu Speed: 25MHz
• Digital Ic Case Style: CQFP
• No. Of Pins: 184
• Supply Voltage Range: 4.75V To 5.25V
• Operating Temperature Range: 0°C To
• Rohs Compliant: Yes
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 184
• Package Type: CQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

When the processor encounters an unsupported data type, the procedure taken is
identical to that used when an unimplemented instruction is taken. Unsupported data
types with operands that have opclass 010 or 000 (register-to-register or memory-to-
register) instructions cause a pre-instruction exception. When an unsupported data type is
detected for opclass 011 (register-to-memory) instructions, a post-instruction exception is
generated immediately. A format $0 (for the pre-instruction exception) or format $3 (for the
post-instruction exception) stack frame is saved, and vector number 55 is fetched. A
denormalized value generated as the result of a floating-point operation generates a
nonmaskable underflow exception instead of an unsupported data type exception.
Table 9-16 lists the floating-point state frame fields for unsupported data type exceptions
resulting from the execution of opclass 010 or 000 (register-to-register or memory-to-
register) instructions, and opclass 011 (register-to-memory) instructions defined for the
use by the supervisor exception handler.
A denormalized or unnormalized extended-precision source or destination operand is
copied directly without modification to ETEMP or FPTEMP fields in the floating-point state
frame. If a packed decimal real source operand is specified, the upper 32 bits of the
operand are copied to the FPTEMP field, and the lower 64 bits are copied to ETEMP. The
destination operand in this case remains in the destination floating-point register, and can
be either denormalized or unnormalized. Figure 9-9 illustrates denormalized single- (a)
and double-precision (b) operands stored in ETEMP field.
The exception handler uses the floating-point state frame information to determine which
operand (or operands) is the unsupported data type and which instruction attempted to
use the offending operand. The exception handler must provide the routines needed to
complete the instruction and to store that instruction to the proper destination, whether it
be in a floating-point data register, integer data register, or external memory. Once the
destination is written, the floating-point state frame is discarded, and normal execution is
resumed by using the RTE instruction. This approach does not report floating-point
arithmetic exceptions that may have been generated. Motorola recommends that the user
utilize the M68040FPSP if a full exception-reporting model is required. Motorola does not
provide any printed documentation other than what is embedded in the source code of the
M68040FPSP.
MOTOROLA
In this manual, all references to the unsupported floating-point
data types also refer to the unimplemented data types in the
M68040FPSP.
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
M68040 USER’S MANUAL
NOTE
9- 23