MC68EC040FE25A Freescale Semiconductor, MC68EC040FE25A Datasheet - Page 236

• Manufacturer Part Number: MC68EC040FE25A
• Description: IC MPU 32BIT 25MHZ 184-CQFP
• Manufacturer: Freescale Semiconductor
• Series: M68000r

Specifications of MC68EC040FE25A

• Processor Type: M680x0 32-Bit
• Speed: 25MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 184-CQFP
• Core Size: 32bit
• Program Memory Size: 8KB
• Cpu Speed: 25MHz
• Digital Ic Case Style: CQFP
• No. Of Pins: 184
• Supply Voltage Range: 4.75V To 5.25V
• Operating Temperature Range: 0°C To
• Rohs Compliant: Yes
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 184
• Package Type: CQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

8.4.4 Floating-Point Post-Instruction Stack Frame (Format $3)
The processor restores the SR and PC values from the stack and increments the active
supervisor stack pointer by $C. If another floating-point post-instruction exception is
pending, exception processing begins immediately for the new exception; otherwise, the
processor resumes normal instruction execution.
8.4.5 Eight-Word Stack Frame (Format $4)
The MC68040V, MC68LC040, MC68EC040, and MC68EC040V use this stack frame for
unimplemented floating-point instructions. The MC68040 does not generate or recognize
this format stack frame. Refer to Appendix A MC68LC040 and Appendix B MC68EC040
for further details about this stack frame.
MOTOROLA
SP
+$02
+$06
+$08
15
0 0 1 1
FLOATING-POINT POST-INSTRUCTION
STACK FRAME–FORMAT $3
Stack Frames
PROGRAM COUNTER
EFFECTIVE ADDRESS
STATUS REGISTER
VECTOR OFFSET
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
M68040 USER’S MANUAL
0
• Floating-Point Post-
Instruction
Exception Types
• Next Instruction: <ea> is the
calculated effective address
for the floating-point
instruction.
Stacked PC Points To
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