MC68EC040FE25A Freescale Semiconductor, MC68EC040FE25A Datasheet - Page 149

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MC68EC040FE25A

Manufacturer Part Number
MC68EC040FE25A
Description
IC MPU 32BIT 25MHZ 184-CQFP
Manufacturer
Freescale Semiconductor
Series
M68000r
Datasheets

Specifications of MC68EC040FE25A

Processor Type
M680x0 32-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
184-CQFP
Core Size
32bit
Program Memory Size
8KB
Cpu Speed
25MHz
Digital Ic Case Style
CQFP
No. Of Pins
184
Supply Voltage Range
4.75V To 5.25V
Operating Temperature Range
0°C To
Rohs Compliant
Yes
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
25MHz
Instruction Set Architecture
RISC
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
184
Package Type
CQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68EC040FE25A
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC68EC040FE25A
Manufacturer:
MOTOROLA/摩托罗拉
Quantity:
20 000
Figure 7-5 illustrates the transfer of a long-word operand from an odd address requiring
more than one bus cycle. For the first transfer or bus cycle, the SIZx signals specify a byte
transfer, and the byte offset is $1. The slave device supplies the byte and acknowledges
the data transfer. When the processor starts the second cycle, the SIZx signals specify a
word transfer with a byte offset of $2. The next two bytes are transferred during this cycle.
The processor then initiates the third cycle, with the SIZEx signals indicating a byte
transfer. The byte offset is now $0; the port supplies the final byte and the operation is
complete. This example is similar to the one illustrated in Figure 7-6 except that the
operand is word sized and the transfer requires only two bus cycles. Figure 7-7 illustrates
a functional timing diagram for a misaligned long-word read transfer.
MOTOROLA
31
31
31
31
BYTE 0
BYTE 0
BYTE 0
BYTE 0
XXX
XXX
Figure 7-5. Example of a Misaligned Long-Word Transfer
Figure 7-6. Example of a Misaligned Word Transfer
24 23
24 23
24 23
24 23
Freescale Semiconductor, Inc.
For More Information On This Product,
BYTE 3
BYTE 3
XXX
XXX
XXX
Go to: www.freescale.com
M68040 USER’S MANUAL
DATA BUS
DATA BUS
MEMORY
MEMORY
16 15
16 15
16 15
16 15
BYTE 2
BYTE 2
XXX
XXX
XXX
8 7
8 7
8 7
8 7
BYTE 1
BYTE 1
BYTE 1
BYTE 1
BYTE 1
XXX
XXX
X
0
0
0
0
TRANSFER 1
TRANSFER 2
TRANSFER 3
TRANSFER 1
TRANSFER 2
7- 7

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