MC68EC040FE25A Freescale Semiconductor, MC68EC040FE25A Datasheet - Page 115

• Manufacturer Part Number: MC68EC040FE25A
• Description: IC MPU 32BIT 25MHZ 184-CQFP
• Manufacturer: Freescale Semiconductor
• Series: M68000r

Specifications of MC68EC040FE25A

• Processor Type: M680x0 32-Bit
• Speed: 25MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 184-CQFP
• Core Size: 32bit
• Program Memory Size: 8KB
• Cpu Speed: 25MHz
• Digital Ic Case Style: CQFP
• No. Of Pins: 184
• Supply Voltage Range: 4.75V To 5.25V
• Operating Temperature Range: 0°C To
• Rohs Compliant: Yes
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 184
• Package Type: CQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

When a ‘branch taken/end current instruction’ is indicated, it means that a change of
instruction flow is pending. Along with the following instructions, an exception stacking
(encoding F) sequence is ended with the ‘supervisor, branch taken/end current instruction’
encoding as though it were a virtual JMP instruction. This includes all the possible
exceptions listed in the processor’s vector table. Instructions that cause a ‘branch
taken/end current instruction’ encoding when they are executed are as follows:
The Bcc (not taken) and DBcc (not taken) are the only instructions that cause a ‘branch
not taken/end current instruction’ encoding. Note that the FBcc (not taken) is not included
in this category. The FBcc (not taken) instruction ends with an ‘end current instruction’
encoding. All other instructions and conditions end with the ‘end current instruction’
encoding. For instance, if the processor is running back-to-back single clock instructions,
the encoding ‘end current instruction’ remains asserted for as many clock cycles as
instructions.
MOTOROLA
NOTE: *MC68040V and MC68EC040V only.
Hex
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
ANDI to SR
Bcc (Taken)
BRA
BSR
CAS
CAS2
CINV
CPUSH
PST3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
PST2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
Freescale Semiconductor, Inc.
PST1
Table 5-6. Processor Status Encoding
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
For More Information On This Product,
FDBcc (Always)
FMOVEM Rc,MRn
FMOVEM FPm,MRn
FSAVE
DBcc (Taken)
FBcc (Taken)
JMP
JSR
PST0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Go to: www.freescale.com
M68040 USER’S MANUAL
User, Start/Continue Current Instruction
User, End Current Instruction
User, Branch Not Taken/End Current Instruction
User, Branch Taken/End Current Instruction
User, Table Search
Halted State (Double Bus Fault)
Low-Power Stop Mode (Supervisor Instruction)*
Reserved
Supervisor, Start/Continue Current Instruction
Supervisor, End Current Instruction
Supervisor, Branch Not Taken/End Current Instruction
Supervisor, Branch Taken/End Current Instruction
Supervisor, Table Search
Stopped State (Supervisor Instruction)
RTE Executing
Exception Stacking
MOVE USP
MOVEC
NOP
ORI to SR
PFLUSH
PTEST
MOVE to SR
MOVES
Internal Status
RTR
TAS
RTD
RTE
RTS
STOP
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