ADE7166ASTZF8 Analog Devices Inc, ADE7166ASTZF8 Datasheet - Page 59

• Manufacturer Part Number: ADE7166ASTZF8
• Description: IC ENERGY METER 1PHASE 64LQFP
• Manufacturer: Analog Devices Inc

Specifications of ADE7166ASTZF8

• Applications: Energy Measurement
• Core Processor: 8052
• Program Memory Type: FLASH (8 kB)
• Controller Series: ADE71xx
• Ram Size: 512 x 8
• Interface: I²C, SPI, UART
• Number Of I /o: 20
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Ic Function: Single Phase Energy Measurement IC
• Supply Voltage Range: 3.13V To 3.46V, 2.4V To 3.7V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: LQFP
• No. Of Pins: 64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Active Power Gain Calibration
Figure 65 shows the signal processing chain for the active power
calculation in the ADE7566/ADE7569/ADE7166/ADE7169. As
explained previously, the active power is calculated by filtering
the output of the multiplier with a low-pass filter. Note that
when reading the waveform samples from the output of LPF2,
the gain of the active energy can be adjusted by using the
multiplier and watt gain register (WGAIN[11:0]). The gain is
adjusted by writing a twos complement 12-bit word to the watt
gain register. Equation 12 shows how the gain adjustment is
related to the contents of the watt gain register.
For example, when 0x7FF is written to the watt gain register, the
power output is scaled up by 50% (0x7FF = 2047d, 2047/2
Similarly, 0x800 = −2048d (signed, twos complement) and
power output is scaled by –50%. Each LSB scales the power
output by 0.0244%. The minimum output range is given when
the watt gain register contents are equal to 0x800 and the
maximum range is given by writing 0x7FF to the watt gain
register. This can be used to calibrate the active power (or
energy) calculation in the ADE7566/ADE7569/ADE7166/
ADE7169.
Active Power Offset Calibration
The ADE7566/ADE7569/ADE7166/ADE7169 also incorporate
an active power offset register (WATTOS[15:0]). It is a signed,
twos complement, 16-bit register that can be used to remove
offsets in the active power calculation (see
can exist in the power calculation due to crosstalk between
channels on the PCB or in the IC itself. The offset calibration
allows the contents of the active power register to be maintained
at 0 when no power is being consumed.
The 256 LSBs (WATTOS = 0x0100) written to the active power
offset register are equivalent to 1 LSB in the waveform sample
register. Assuming the average value, output from LPF2 is
0xCCCCD (838,861d) when inputs on the voltage and current
channels are both at full scale. At −60 dB down on the current
channel (1/1000 of the current channel full-scale input), the
average word value output from LPF2 is 838.861 (838,861/1,000).
One LSB in the LPF2 output has a measurement error of
1/838.861 × 100% = 0.119% of the average value. The active
power offset register has a resolution equal to 1/256 LSB of the
waveform register. Therefore, the power offset correction
resolution is 0.000464%/LSB (0.119%/256) at −60 dB.
Output
WGAIN
=
⎛
⎜ ⎜
⎝
Active
Power
×
⎧
⎨
⎩
1
Figure 63). An offset
+
WGAIN
2
12
⎫
⎬
⎭
⎞
⎟ ⎟
⎠
12
= 0.5).
Rev. A | Page 59 of 144
(12)
Active Power Sign Detection
The ADE7566/ADE7569/ADE7166/ADE7169 detect a change
of sign in the active power. The APSIGN flag in the Interrupt
Status 1 SFR (MIRQSTL, 0xDC) records when a change of sign
has occurred according to Bit APSIGN in the ACCMODE
register (0x0F). If the APSIGN flag is set in the Interrupt Enable
1 SFR (MIRQENL, 0xD9), the 8052 core has a pending ADE
interrupt. The ADE interrupt stays active until the APSIGN
status bit is cleared (see the Energy Measurement Interrupts
section).
When APSIGN in the ACCMODE register (0x0F) is cleared
(default), the APSIGN flag in the Interrupt Status 1 SFR
(MIRQSTL, 0xDC) is set when a transition from positive–to-
negative active power has occurred.
When APSIGN in the ACCMODE register (0x0F) is set, the
APSIGN flag in the MIRQSTL SFR is set when a transition
from negative to positive active power occurrs.
Active Power No-Load Detection
The ADE7566/ADE7569/ADE7166/ADE7169 include a no-
load threshold feature on the active energy that eliminates any
creep effects in the meter. The part accomplishes this by not
accumulating energy if the multiplier output is below the no-
load threshold. When the active power is below the no-load
threshold, the APNOLOAD flag in the Interrupt Status 1 SFR
(MIRQSTL, 0xDC) is set. If the APNOLOAD bit is set in the
Interrupt Enable 1 SFR (MIRQENL, 0xD9), the 8052 core has a
pending ADE interrupt. The ADE interrupt stays active until
the APNOLOAD status bit is cleared (see the
Measurement Interrupts
The no-load threshold level is selectable by setting the
APNOLOAD bits in the NLMODE register (0x0E). Setting
these bits to 0b00 disables the no-load detection, and setting
them to 0b01, 0b10, or 0b11 sets the no-load detection
threshold to 0.015%, 0.0075%, or 0.0037% of the multiplier’s
full-scale output frequency, respectively. The IEC 62053-21
specification states that the meter must start up with a load
equal to or less than 0.4% I
full-scale output frequency of the multiplier.
ADE7566/ADE7569/ADE7166/ADE7169
section).
PB
, which translates to .0167% of the
Energy