ADE7166ASTZF8 Analog Devices Inc, ADE7166ASTZF8 Datasheet - Page 133

• Manufacturer Part Number: ADE7166ASTZF8
• Description: IC ENERGY METER 1PHASE 64LQFP
• Manufacturer: Analog Devices Inc

Specifications of ADE7166ASTZF8

• Applications: Energy Measurement
• Core Processor: 8052
• Program Memory Type: FLASH (8 kB)
• Controller Series: ADE71xx
• Ram Size: 512 x 8
• Interface: I²C, SPI, UART
• Number Of I /o: 20
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Ic Function: Single Phase Energy Measurement IC
• Supply Voltage Range: 3.13V To 3.46V, 2.4V To 3.7V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: LQFP
• No. Of Pins: 64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

SPI INTERRUPT AND STATUS FLAGS
The SPI interface has several status flags that indicate the status
of the double-buffered receive and transmit registers. Figure 109
shows when the status and interrupt flags are raised. The transmit
interrupt occurs when the transmit shift register is loaded with
the data in the SPI/I
register. If the SPI master is in transmit operating mode, and the
SPI/I
been written with new data by the beginning of the next byte
transfer, the transmit operation stops.
When a new byte of data is received in the SPI/I
Buffer SFR (SPI2CRx, 0x9B) register, the SPI receive interrupt
flag is raised. If the data in the SPI/I
2
C Transmit Buffer SFR (SPI2CTx, 0x9A) register has not
2
C Transmit Buffer SFR (SPI2CTx, 0x9A)
SPICPHA = 0
SPICPHA = 1
2
C Receive Buffer SFR
SPITx1 FLAGS
SPITx0 FLAGS
SPIRx1 AND
SPIRx0 AND
(SPICPOL = 1)
SPITx1 FLAGS
SPITx0 FLAGS
(SPICPOL=0)
SPIRx1 AND
SPIRx0 AND
MISO
MOSI
SCLK
SCLK
SS_b
2
MISO
MOSI
C Receive
Figure 110. SPI Timing Configurations
MSB BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 LSB
MSB BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 LSB
?
?
Rev. A | Page 133 of 144
MSB BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 LSB
MSB BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 LSB
(SPI2CRx, 0x9B) register is not read before new data is ready to
be loaded into the SPI/I
an overflow condition has occurred. This overflow condition,
indicated by the SPIRxOF flag, forces the new data to be discarded
or overwritten if the RxOFW bit is set.
TRANSMIT SHIFT REGISTER
TRANSMIT SHIFT REGISTER
ADE7566/ADE7569/ADE7166/ADE7169
Figure 109. SPI Receive and Transmit Interrupt and Status Flags
SPITx (EMPTY)
SPITx
STOPS TRANSFER IF TIMODE = 1
SPITxIRQ = 1
2
C Receive Buffer SFR (SPI2CRx, 0x9B),
?
?
RECEIVE SHIFT REGISTER
RECEIVE SHIFT REGISTER
SPIRx (FULL)
SPIRx
SPIRxOF = 1
SPIRxIRQ = 1