ADE7166ASTZF8 Analog Devices Inc, ADE7166ASTZF8 Datasheet - Page 129

IC ENERGY METER 1PHASE 64LQFP

ADE7166ASTZF8

Manufacturer Part Number
ADE7166ASTZF8
Description
IC ENERGY METER 1PHASE 64LQFP
Manufacturer
Analog Devices Inc
Datasheets

Specifications of ADE7166ASTZF8

Applications
Energy Measurement
Core Processor
8052
Program Memory Type
FLASH (8 kB)
Controller Series
ADE71xx
Ram Size
512 x 8
Interface
I²C, SPI, UART
Number Of I /o
20
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
64-LQFP
Ic Function
Single Phase Energy Measurement IC
Supply Voltage Range
3.13V To 3.46V, 2.4V To 3.7V
Operating Temperature Range
-40°C To +85°C
Digital Ic Case Style
LQFP
No. Of Pins
64
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Part Number
Manufacturer
Quantity
Price
Part Number:
ADE7166ASTZF8
Manufacturer:
Analog Devices Inc
Quantity:
10 000
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ADE7166ASTZF8-RL
Manufacturer:
Analog Devices Inc
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Table 140. SPI Configuration SFR 1 (SPIMOD1, 0xE8)
Bit
7 to 6
5
4
3
2
1 to 0
Address
0xEF to
0xEE
0xED
0xEC
0xEB
0xEA
0xE9 to
0xE8
Mnemonic
Reserved
INTMOD
AUTO_SS
SS_EN
RxOFW
SPIR[1:0]
Default
0
0
1
0
0
0
Description
Reserved.
SPI Interrupt Mode.
INTMOD
0
1
Master Mode, SS Output Control (see Figure 108).
AUTO_SS
0
1
Slave Mode, SS Input Enable.
When this bit is set to Logic 1, the SS pin is defined as the slave select input pin for the SPI
slave interface.
Receive Buffer Overflow Write Enable.
RxOFW
0
1
Master Mode, SPI SCLK Frequency.
SPIR[1:0]
00
01
10
11
Rev. A | Page 129 of 144
Result
SPI interrupt is set when SPI Rx buffer is full.
SPI interrupt is set when SPI Tx buffer is empty.
Result
The SS pin is held low while this bit is cleared. This allows manual chip select
control using the SS pin.
Single Byte Read or Write. The SS pin goes low during a single byte
transmission and then returns high.
Continuous Transfer. The SS pin goes low during the duration of the multibyte
continuous transfer and then returns high.
Result
If the SPI2CRx SFR has not been read when a new data byte is received,
the new byte is discarded.
If the SPI2CRx SFR has not been read when a new data byte is received,
the new byte overwrites the old data.
Result
f
f
f
f
CORE
CORE
CORE
CORE
/8 = 512 kHz (if f
/16 = 256 kHz (if f
/32 = 128 kHz (if f
/64 = 64 kHz (if f
ADE7566/ADE7569/ADE7166/ADE7169
CORE
CORE
CORE
CORE
= 4.096 MHz)
= 4.096 MHz)
= 4.096 MHz)
= 4.096 MHz)

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