EP2AGX95EF29C4N Altera, EP2AGX95EF29C4N Datasheet - Page 446

• Manufacturer Part Number: EP2AGX95EF29C4N
• Description: IC ARRIA II GX FPGA 95K 780FBGA
• Manufacturer: Altera
• Series: Arria II GXr

Specifications of EP2AGX95EF29C4N

• Number Of Logic Elements/cells: 89178
• Number Of Labs/clbs: 3747
• Total Ram Bits: 6679
• Number Of I /o: 372
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 780-FBGA
• Family Name: Arria® II GX
• Number Of Logic Blocks/elements: 93674
• # I/os (max): 372
• Frequency (max): 500MHz
• Operating Supply Voltage (typ): 900mV
• Logic Cells: 93674
• Ram Bits: 7025459.2
• Operating Supply Voltage (min): 0.87V
• Operating Supply Voltage (max): 0.93V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 780
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

1–60
Figure 1–59. Example of Reset Condition in GIGE Mode
Arria II Device Handbook Volume 2: Transceivers
tx_digitalreset
tx_dataout
clock
K28.5
Figure 1–58
Figure 1–58. Example of Automatic Ordered Set Generation
GIGE Mode Reset Condition
After de-assertion of the tx_digitalreset signal, the GIGE transmitter automatically
transmits three /K28.5/ comma code groups before transmitting user data on the
tx_datain port. This could affect the synchronization state machine behavior at the
receiver. Depending on when you start transmitting the synchronization sequence,
there could be an even or odd number of /Dx.y/ code groups transmitted between
the last of the three automatically sent /K28.5/ code groups and the first /K28.5/
code group of the synchronization sequence. If there is an even number of /Dx.y/
code groups received between these two /K28.5/ code groups, the first /K28.5/ code
group of the synchronization sequence begins at an odd code group boundary. An
IEEE802.3-compliant GIGE synchronization state machine treats this as an error
condition and goes into the Loss-of-Sync state.
Figure 1–59
automatically sent /K28.5/ and the first user-sent /K28.5/. The first user-sent
/K28.5/ code group received at an odd code group boundary in cycle n + 3 takes the
receiver synchronization state machine in Loss-of-Sync state. The first
synchronization ordered-set /K28.5/Dx.y/ in cycles n + 3 and n + 4 are discounted
and three additional ordered sets are required for successful synchronization.
Word Aligner in GIGE Mode
The word aligner in GIGE functional mode is configured in automatic
synchronization state machine mode, which complies with the IEEE P802.3ae
standard. The Quartus II software automatically configures the synchronization state
machine to indicate synchronization when the receiver acquires three consecutive
synchronization ordered sets. A synchronization ordered set is a /K28.5/ code group
followed by an odd number of valid /Dx.y/ code groups. The fastest way for the
receiver to achieve synchronization is to receive three continuous {/K28.5/, /Dx.y/}
ordered sets.
xxx
Ordered Set
tx_datain[ ]
K28.5
tx_dataout
shows the automatic idle ordered set generation.
shows an example of even numbers of /Dx.y/ between the last
clock
K28.5
K28.5
Dx.y
n
K28.5
n + 1
D14.3
K28.5
Dx.y
/I1/
n + 2
K28.5
D5.6
Dx.y
n + 3
D24.0
K28.5
K28.5
/I2/
Chapter 1: Transceiver Architecture in Arria II Devices
n + 4
K28.5
D16.2
Dx.y
D15.8
K28.5
K28.5
/I2/
D16.2
K28.5
December 2010 Altera Corporation
Dx.y
D21.51
K28.5
K28.5
/C1/
D21.5
Dx.y
Functional Modes
Dx.y