EP2AGX95EF29C4N Altera, EP2AGX95EF29C4N Datasheet - Page 150

• Manufacturer Part Number: EP2AGX95EF29C4N
• Description: IC ARRIA II GX FPGA 95K 780FBGA
• Manufacturer: Altera
• Series: Arria II GXr

Specifications of EP2AGX95EF29C4N

• Number Of Logic Elements/cells: 89178
• Number Of Labs/clbs: 3747
• Total Ram Bits: 6679
• Number Of I /o: 372
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 780-FBGA
• Family Name: Arria® II GX
• Number Of Logic Blocks/elements: 93674
• # I/os (max): 372
• Frequency (max): 500MHz
• Operating Supply Voltage (typ): 900mV
• Logic Cells: 93674
• Ram Bits: 7025459.2
• Operating Supply Voltage (min): 0.87V
• Operating Supply Voltage (max): 0.93V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 780
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

5–46
Arria II Device Handbook Volume 1: Device Interfaces and Integration
Table 5–16
Table 5–16
PLLs, which have 10 post-scale counters. The order of bits is the same for the left and
right PLLs, but the reconfiguration bits start with the C6 post-scale counter.
Table 5–16. Top and Bottom PLL Reprogramming Bits for Arria II GZ Devices
C9
C8
C7
C6
C5
C4
C3
C2
C1
C0
M
N
Charge Pump Current
VCO Post-Scale divider (K)
Loop Filter Capacitor
Loop Filter Resistor
Unused CP/LF
Total number of bits
Notes to
(1) Includes two control bits, rbypass for bypassing the counter, and rselodd to select the output clock duty cycle.
(2) The LSB for the C9 low-count value is the first bit shifted into the scan chain for the top and bottom PLLs.
(3) The LSB for the C6 low-count value is the first bit shifted into the scan chain for the left and right PLLs.
(4) The MSB for the loop filter is the last bit shifted into the scan chain.
(2)
(3)
Table
lists the number of bits for each component of a Arria II GZ PLL.
also lists the scan chain order of PLL components for the top and bottom
Block Name
5–16:
(4)
Counter
16
16
16
16
16
16
16
16
16
16
16
16
—
0
1
0
0
0
Number of Bits
Chapter 5: Clock Networks and PLLs in Arria II Devices
Other
—
2
2
2
2
2
2
2
2
2
2
2
2
3
0
2
5
7
(1)
December 2010 Altera Corporation
PLLs in Arria II Devices
Total
234
18
18
18
18
18
18
18
18
18
18
18
18
3
1
2
5
7