PN5120A0HN/C1 NXP Semiconductors, PN5120A0HN/C1 Datasheet - Page 22

• Manufacturer Part Number: PN5120A0HN/C1
• Description: Transmission Module 40-Pin HVQFN EP T/R
• Manufacturer: NXP Semiconductors

Specifications of PN5120A0HN/C1

• Package: 40HVQFN EP
• Operating Temperature: -30 to 85 °C

NXP Semiconductors
PN512
Product data sheet
COMPANY PUBLIC
9.2.1.4 DivIEnReg
Control bits to enable and disable the passing of interrupt requests.
Table 22.
Table 23.
Bit
7
6 to 5
4
3
2
1
0
Access
Rights
IRQPushPull
Symbol
IRQPushPull
-
SiginActIEn
ModeIEn
CRCIEn
RfOnIEn
RfOffIEn
DivIEnReg register (address 03h); reset value: 00h, 00000000b
Description of DivIEnReg bits
r/w
7
All information provided in this document is subject to legal disclaimers.
Rev. 3.6 — 10 March 2011
RFU
6
0
Description
Set to logic 1, the pin IRQ works as standard CMOS output pad.
Set to logic 0, the pin IRQ works as open drain output pad.
Reserved for future use.
Allows the SIGIN active interrupt request to be propagated to pin IRQ.
Allows the mode interrupt request (indicated by bit ModeIRq) to be
propagated to pin IRQ.
Allows the CRC interrupt request (indicated by bit CRCIRq) to be
propagated to pin IRQ.
Allows the RF field on interrupt request (indicated by bit RfOnIRq) to
be propagated to pin IRQ.
Allows the RF field off interrupt request (indicated by bit RfOffIRq) to
be propagated to pin IRQ.
111336
RFU
5
0
SiginActIEn ModeIEn CRCIEn RFOnIEn RFOffIEn
r/w
4
r/w
3
r/w
2
Transmission module
© NXP B.V. 2011. All rights reserved.
r/w
1
PN512
22 of 125
r/w
0