PN5120A0HN/C1 NXP Semiconductors, PN5120A0HN/C1 Datasheet - Page 110

• Manufacturer Part Number: PN5120A0HN/C1
• Description: Transmission Module 40-Pin HVQFN EP T/R
• Manufacturer: NXP Semiconductors

Specifications of PN5120A0HN/C1

• Package: 40HVQFN EP
• Operating Temperature: -30 to 85 °C

NXP Semiconductors
PN512
Product data sheet
COMPANY PUBLIC
25.2.2.1 Bus timing for separated Read/Write strobe
25.2.1 AC symbols
25.2.2 AC operating specification
25.2 8-bit parallel interface timing
Each timing symbol has five characters. The first character is always 't' for time. The other
characters indicate the name of a signal or the logic state of that signal (depending on
position):
Table 171. AC symbols
Example: t
Table 172. Timing specification for separated Read/Write strobe
Designation
A
D
W
R
L
C
S
Symbol Parameter
t
t
t
t
t
t
t
t
t
t
t
t
t
t
LHLL
AVLL
LLAX
LLWL
CLWL
WHCH
RLDV
RHDZ
DVWH
WHDX
WLWH
AVWL
WHAX
WHWL
ALE pulse width
Multiplexed Address Bus valid to ALE low (Address Set Up Time) 5
Multiplexed Address Bus valid after ALE low (Address Hold Time) 5
ALE low to NWR, NRD low
NCS low to NRD, NWR low
NRD, NWR high to NCS high
NRD low to DATA valid
NRD high to DATA high impedance
DATA valid to NWR high
DATA hold after NWR high (Data Hold Time)
NRD, NWR pulse width
Separated Address Bus valid to NRD, NWR low (Set Up Time)
Separated Address Bus valid after NWR high (Hold Time)
period between sequenced read/write accesses
AVLL
= time for address valid to ALE low
All information provided in this document is subject to legal disclaimers.
Signal
address
data
NWR or nWait
NRD or R/NW or nWrite
ALE or AS
NCS
NDS or nDStrb and nAStrb, SCK
Rev. 3.6 — 10 March 2011
111336
Designation
H
L
Z
X
V
N
Logic Level
HIGH
LOW
high impedance
any level or data
any valid signal or data
NSS
Transmission module
Min
10
10
0
0
-
-
5
5
40
30
5
40
© NXP B.V. 2011. All rights reserved.
PN512
Max
-
-
-
35
10
-
-
-
-
-
-
-
-
-
110 of 125
ns
ns
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns