PIC18F65K90-I/MR Microchip Technology, PIC18F65K90-I/MR Datasheet - Page 67

• Manufacturer Part Number: PIC18F65K90-I/MR
• Description: 32kB Flash, 2kB RAM, 1kB EE, NanoWatt XLP, LCD 64 QFN 9x9x0.9mm TUBE
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F65K90-I/MR

• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• Interface Type: I2C, SPI
• Maximum Clock Frequency: 64 MHz
• Number Of Timers: 8
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 16 Channel
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 64MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 53
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN Exposed Pad
• Lead Free Status / Rohs Status: Details

TABLE 4-4:
 2009-2011 Microchip Technology Inc.
Note 1:
2:
3:
4:
5:
Power-Managed
SEC_IDLE mode
PRI_IDLE mode
RC_IDLE mode
Sleep mode
T
runs concurrently with any other required delays (see
Includes postscaler derived frequencies. On Reset, INTOSC defaults to HF-INTOSC at 8 MHz.
T
(Parameter F12,
Execution continues during T
The clock source is dependent upon the settings of the SCS (OSCCON<1:0>), IRCF (OSCCON<6:4>)
and FOSC (CONFIG1H<3:0>) bits.
CSD
OST
Mode
(Parameter 38,
is the Oscillator Start-up Timer (Parameter 32,
EXIT DELAY ON WAKE-UP BY RESET FROM SLEEP MODE OR ANY IDLE MODE
(BY CLOCK SOURCES)
Table
Table
31-7); it is also designated as T
31-10) is a required delay when waking from Sleep and all Idle modes, and
IOBST
Clock Source
MF-INTOSC
MF-INTOSC
MF-INTOSC
HF-INTOSC
HF-INTOSC
HF-INTOSC
LF-INTOSC
LF-INTOSC
LF-INTOSC
LP, XT, HS
LP, XT, HS
EC, RC
EC, RC
HSPLL
HSPLL
(Parameter 39,
SOSC
(2)
(2)
(2)
(2)
(2)
(2)
(5)
PIC18F87K90 FAMILY
Table
Table
Section 4.4 “Idle
PLL
31-10), the INTOSC stabilization period.
.
31-10). T
T
Exit Delay
OST
T
T
T
T
T
T
IOBST
CSD
CSD
CSD
OST
CSD
RC
+ t
(1)
(1)
(1)
(3)
(1)
rc
is the PLL Lock-out Timer
(4)
(3)
Modes”).
Clock Ready
Status Bits
SOSCRUN
DS39957D-page 67
MFIOFS
HFIOFS
MFIOFS
HFIOFS
HFIOFS
MFIOFS
OSTS
OSTS
None
None
None