ZPSD511B1C15J STMicroelectronics, ZPSD511B1C15J Datasheet - Page 92

• Manufacturer Part Number: ZPSD511B1C15J
• Manufacturer: STMicroelectronics

Specifications of ZPSD511B1C15J

• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Supplier Unconfirmed

Counter/Timer
Registers
(Cont.)
9.6.2.6 Status Flags Register
There are eight READ-ONLY status flags. The lower four bits represent Freeze
Acknowledge bits.
FrezAck0 Bit:
FrezAck1 Bit:
FrezAck2 Bit:
FrezAck3 Bit:
DLCY Register:
Bits
Various Clock Scaling values possible are 0 through 31 (decimal).
At RESET these bits initialize as 0. If necessary, the user has the option to set these bits up
to generate Delay Cycles (DLCY) to scale down the Counter/Timer clock (see Table 24).
FrezAck Bits
These Freeze Acknowledge bits are useful in the Freeze/Freeze Acknowledge protocol.
After the Microcontroller senses that the FrezAck bit is being set it proceeds to access the
Image Register for a read or write operation.
NOTE:
NOTES: At RESET all these bits intialize as 0's.
Bit 7
*
Bit 7
<
*
4:0
*
*
= Not used.
>
Bit 6
= Not used.
of the DLCY register are used to assign Delay Cycles to the Counter/Timer.
*
Bit 6
*
When this bit is
1:
0:
When this bit is
1:
0:
When this bit is
1:
0:
When this bit is
1:
0:
Bit 5
*
Image Register Access is granted.
Image Register Access is not granted.
Image Register Access is granted.
Image Register Access is not granted.
Image Register Access is granted.
Image Register Access is not granted.
Image Register Access is granted.
Image Register Access is not granted.
Bit 4
Bit 5
*
*
FrezAck3
DLCY4
Bit 3
Bit 4
DLCY3
FrezAck2
Bit 3
Bit 2
DLCY2
Bit 2
FrezAck1
Bit 1
DLCY1
Bit 1
PSD5XX Family
FrezAck0
Bit 0
DLCY0
Bit 0
89