ZPSD511B1C15J STMicroelectronics, ZPSD511B1C15J Datasheet - Page 109

• Manufacturer Part Number: ZPSD511B1C15J
• Manufacturer: STMicroelectronics

Specifications of ZPSD511B1C15J

• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Supplier Unconfirmed

System
Configuration
(Cont.)
106
PSD5XX Family
Table 31a. Other Register Address Offset
(For 16-Bit Motorola MCUs in 16-Bit Mode. If 8-Bit Mode is selected, use Table 31.)
Table 32. I/O Register Function
Register Name
Data In
Control
Data Out
Direction
Open Drain
Special Function
PLD – I/O
Macrocell Out
INTR. MASK
INTR. REQUEST
LATCH
PMMR1
STATUS FLAGS
SOFTWARE
LOAD/STORE
CMD3
CMD1
CNTR3
CNTR2
CNTR1
CNTR0
IMG3
IMG2
IMG1
IMG0
Register Name
This Register is used to read the input on the port pins.
A
A “1” sets the pin in MCU I/O Mode.
Holds the output data in the MCU I/O Mode.
This register is used to control the data flow in the I/O ports.
A “0” sets the corresponding pin as an input pin.
A “1” sets the pin as an output pin.
A “0” sets the corresponding pin driver as a CMOS driver.
A “1” sets the pin driver as an Open Drain Driver.
A “1” sets the corresponding port pin as Timer or Interrupt Output.
A read only status register; a “1” indicates the corresponding pin
is configured as a PLD pin.
This register holds the outputs of the GPLD macrocells.
“0” sets the corresponding port pin in Address Out Mode.
Address
Offset
D2
D0
B0
A8
A4
A2
A0
9E
9C
9A
98
96
94
92
90
Register Function
PAGE REGISTER
INTR. READ CLEAR
INTR. EDGE/LEVEL
INTR. PRIORITY
STATUS
VM
PMMR0
GLOBAL COMMAND
DLCY
FREEZE COMMAND
CMD2
CMD0
CNTR3
CNTR2
CNTR1
CNTR0
IMG3
IMG2
IMG1
IMG0
Register Name
Address
Offset
D5
D3
D1
C1
9D
E1
B1
A9
A7
A5
A3
A1
9F
9B
99
97
95
93
91