ZPSD511B1C15J STMicroelectronics, ZPSD511B1C15J Datasheet - Page 107

• Manufacturer Part Number: ZPSD511B1C15J
• Manufacturer: STMicroelectronics

Specifications of ZPSD511B1C15J

• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Supplier Unconfirmed

12.0
System
Configuration
104
PSD5XX Family
Table 30a. I/O Register Address Offset
(For 16-Bit Motorola MCUs in 16-Bit Mode. If 8-Bit Mode is selected, use Table 30.)
The CSIOP signal, which is generated by the DPLD, selects the internal I/O devices or
registers. The CSIOP signal takes up 256 bytes of address space and is defined by the user
in the PSDSoft Software. The following is an address offset map for the various devices
relative to the CSIOP base address.
Some Motorola 16-bit microcontrollers have a different data bus/data byte orientation. This
requires a different address offset for the internal PSD5XX I/O devices or registers. Tables
30a and 31a in this section are for this group of microcontrollers which include the
M68HC16, M68302 and M683XX.
The following table is the address map offset of the I/O port registers.
Table 30. I/O Register Address Offset
Register Name
Data In
Control
Data Out
Direction
Open Drain
Special Function
PLD – I/O
Macrocell Out
Register Name
Data In
Control
Data Out
Direction
Open Drain
Special Function
PLD – I/O
Macrocell Out
Port A
Port A
0D
0A
0C
0B
00
02
04
06
08
01
03
05
07
09
Port B
Port B
0D
0A
0C
0B
00
02
04
06
08
01
03
05
07
09
Address Offset
Address Offset
Port C
Port C
13
15
17
19
10
12
14
16
18
11
Port D
Port D
10
12
14
16
18
11
13
15
17
19
Port E
Port E
2C
2B
2D
2A
21
23
25
27
29
20
22
24
26
28