ZPSD511B1C15J STMicroelectronics, ZPSD511B1C15J Datasheet - Page 118

• Manufacturer Part Number: ZPSD511B1C15J
• Manufacturer: STMicroelectronics

Specifications of ZPSD511B1C15J

• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Supplier Unconfirmed

13.8 Microcontroller Interface – AC/DC Parameters
Read Timing
Explanation of AC Symbols for Non ZPLD Timing.
Example:
A – Address
C – Power Down
D– Input Data
E – E
H – Logic Level High
I – Interrupt
NOTES: 1. RD timing has the same timing as PSEN, DS, LDS, UDS signals.
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
LVLX
AVLX
LXAX
AVQV
SLQV
RLQV
RHQX
RLRH
RHQZ
EHEL
THEH
ELTL
AVPV
2. RD and PSEN have the same timing for 8031 mode.
3. Read to Data Valid of the Interrupt Request Latch and Interrupt Priority Status. RD timing has the same timing as PSEN, DS,
4. Any input used to select an internal PSD5XX function.
5. In multiplexed mode latched address generated from ADIO delay to address output on any Port.
*
The -90 speed is available only on Industrial Temperature Range product.
ALE or AS Pulse Width
Address Setup Time
Address Hold Time
Address Valid to Data
Valid
CS Valid to Data Valid
RD to Data Valid
8/16-Bit Bus
RD to Data Valid 8-Bit
Bus, 8031 Separate
Mode
RD to Data Valid from
Interrupt Controller
RD Data Hold Time
RD Pulse Width
RD to Data High-Z
E Pulse Width
R/W Setup Time
to Enable
R/W Hold Time After
Enable
Address Input Valid to
Address Output Delay
LDS, UDS signals.
(5 V ± 10% Versions)
t
AVLX
Parameter
Time from Address Valid to ALE Invalid.
L – Logic Level Low or ALE
N – Reset
P – Port Signal
Q – Output Data
R – WR, UDS, LDS, DS, IORD, PSEN
S – Chip Select
(Note 4)
(Note 4)
(Note 4)
(Note 1)
(Note 2)
(Note 3)
(Note 1)
(Note 1)
(Note 1)
In 16-Bit Data Bus
Mode (Note 5)
In 8-Bit Data Bus
Mode (Note 5)
Conditions
Min Max Min Max Min Max
18
30
30
5
7
0
8
0
-70
70
80
20
32
32
22
20
22
(5 V ± 10% Versions)
20
32
32
10
6
8
0
0
-90*
T – R/W
t – Time
V – Valid
X – No Longer a Valid Logic Level
Z – Float
100
90
32
38
38
25
30
32
28
10
38
38
18
11
0
0
-15
150
150
40
45
45
33
38
48
EPROM_CMiser
Add 10
Add 10
ON
0
0
0
0
0
0
0
0
0
0
0
0
0
0
PSD5XX Family
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
115