JS28F512P33BFD Micron Technology Inc, JS28F512P33BFD Datasheet - Page 41

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JS28F512P33BFD

Manufacturer Part Number
JS28F512P33BFD
Description
Manufacturer
Micron Technology Inc
Datasheet

Specifications of JS28F512P33BFD

Cell Type
NOR
Density
512Mb
Access Time (max)
105/17ns
Interface Type
Parallel/Serial
Boot Type
Bottom
Address Bus
25b
Operating Supply Voltage (typ)
2.5/3.3V
Operating Temp Range
-40C to 85C
Package Type
TSOP
Program/erase Volt (typ)
8.5 to 9.5V
Sync/async
Async/Sync
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
2.3V
Operating Supply Voltage (max)
3.6V
Word Size
16b
Number Of Words
32M
Supply Current
31mA
Mounting
Surface Mount
Pin Count
56
Lead Free Status / RoHS Status
Supplier Unconfirmed

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P33-65nm
11.2.9
11.3
Datasheet
43
Burst Length (RCR[2:0])
The Burst Length bits (BL[2:0]) select the linear burst length for all synchronous burst
reads of the flash memory array. The burst lengths are 4-word, 8-word, 16-word or
continuous word.
Continuous burst accesses are linear only, and do not wrap within any word length
boundaries (see
cycle begins, the device outputs synchronous burst data until it reaches the end of the
“burstable” address space.
One-Time Programmable (OTP) Registers
The device contains 17 OTP Registers that can be used to implement system security
measures and/or device identification. Each OTP Register can be individually locked.
The first 128-bit OTP Register is comprised of two 64-bit (8-word) segments. The lower
64-bit segment is pre-programmed at the Numonyx factory with a unique 64-bit
number. The upper 64-bit segment, as well as the other sixteen 128-bit OTP Registers,
are blank. Users can program these registers as needed. Once programmed, users can
then lock the OTP Register(s) to prevent additional bit programming (see
“OTP Register Map” on page
Each OTP Register has an associated Lock Register bit. When a Lock Register bit is
programmed, the associated OTP Register can only be read; it can no longer be
programmed. Each OTP Register can be accessed multiple times to program individual
bits, as long as the register remains unlocked. Additionally, because the Lock Register
bits themselves are OTP, when programmed, Lock Register bits cannot be erased.
Therefore, when a OTP Register is locked, it cannot be unlocked.
Table 17, “Burst Sequence Word Ordering” on page
44).
Order Number:208043-05
42). When a burst
Figure 13,
Apr 2010

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