JS28F512P33BFD Micron Technology Inc, JS28F512P33BFD Datasheet - Page 21

• Manufacturer Part Number: JS28F512P33BFD
• Manufacturer: Micron Technology Inc

Specifications of JS28F512P33BFD

• Cell Type: NOR
• Density: 512Mb
• Access Time (max): 105/17ns
• Interface Type: Parallel/Serial
• Boot Type: Bottom
• Address Bus: 25b
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Temp Range: -40C to 85C
• Package Type: TSOP
• Program/erase Volt (typ): 8.5 to 9.5V
• Sync/async: Async/Sync
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.3V
• Operating Supply Voltage (max): 3.6V
• Word Size: 16b
• Number Of Words: 32M
• Supply Current: 31mA
• Mounting: Surface Mount
• Pin Count: 56
• Lead Free Status / RoHS Status: Supplier Unconfirmed

P33-65nm
Table 7:
Datasheet
23
Notes:
1.
2.
3.
4.
5.
Configuration
Blank Check
Protection
Program
Suspend
Mode
Erase
Read
EFI
First command cycle address should be the same as the operation’s target address.
DBA = Device Base Address.(Note: needed for dual-die 2-Gbit device.)
DnA = Address within the device.
IA = Identification code address offset.
CFI-A = Read CFI address offset.
WA = Word address of memory location to be written.
BA = Address within the block.
OTP-RA = OTP Register address.
LRA = Lock Register address.
RCD = Read Configuration Register data on A[16:1].
ID = Identifier data.
CFI-D = CFI data on DQ[15:0].
SRD = Status Register data.
WD = Word data.
N = Word count of data to be loaded into the write buffer.
OTP-D = OTP Register data.
LRD = Lock Register data.
The second cycle of the Buffered Program Command is the word count of the data to be loaded into the write buffer. This
is followed by up to 512 words of data. Then the confirm command (0xD0) is issued, triggering the array programming
operation.
The confirm command (0xD0) is followed by the buffer data.
The second cycle is a Sub-Op-Code, the data written on third cycle is N-1; 1 ≤ N ≤ 512. The subsequent cycles load data
words into the program buffer at a specified address until word count is achieved, after the data words are loaded, the
final cycle is the confirm cycle 0xD0)
Command Bus Cycles
Read Array
Read Device Identifier
Read CFI
Read Status Register
Clear Status Register
Word Program
Buffered Program
Buffered Enhanced
Factory Program
(BEFP)
Block Erase
Program/Erase
Suspend
Program/Erase
Resume
Block Lock
Block Unlock
Block Lock-down
Program OTP Register
Program Lock Register
Configure Read
Configuration Register
Block Blank Check
Extended Function
Interface command
Command
(4)
(3)
(5)
Cycles
Bus
≥ 2
≥ 2
> 2
> 2
>2
1
2
1
2
2
1
1
2
2
2
2
2
2
2
Oper
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
First Bus Cycle
Addr
OTP-RA
DnA
DnA
DnA
DnA
DnA
DnA
RCD
DnA
LRA
WA
WA
WA
WA
BA
BA
BA
BA
BA
(1)
Data
0xD0
0x90
0x98
0x70
0x50
0x40
0xE8
0x80
0x20
0xB0
0x60
0x60
0x60
0xC0
0xC0
0x60
0xBC
0xEB
0xFF
(2)
Oper
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
Read
Read
Read
-
-
-
-
Second Bus Cycle
DBA + CFI-A
Order Number:208043-05
DBA + IA
Addr
OTP-RA
DnA
RCD
LRA
WA
WA
WA
WA
BA
BA
BA
BA
BA
-
-
-
-
(1)
OTP-Data
Data
Sub-Op
CFI-D
N - 1
0xD0
0xD0
0xD0
0x01
0x2F
0x03
code
SRD
Apr 2010
LRD
WD
D0
ID
-
-
-
-
(2)