JS28F512P33BFD Micron Technology Inc, JS28F512P33BFD Datasheet - Page 28

• Manufacturer Part Number: JS28F512P33BFD
• Manufacturer: Micron Technology Inc

Specifications of JS28F512P33BFD

• Cell Type: NOR
• Density: 512Mb
• Access Time (max): 105/17ns
• Interface Type: Parallel/Serial
• Boot Type: Bottom
• Address Bus: 25b
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Temp Range: -40C to 85C
• Package Type: TSOP
• Program/erase Volt (typ): 8.5 to 9.5V
• Sync/async: Async/Sync
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.3V
• Operating Supply Voltage (max): 3.6V
• Word Size: 16b
• Number Of Words: 32M
• Supply Current: 31mA
• Mounting: Surface Mount
• Pin Count: 56
• Lead Free Status / RoHS Status: Supplier Unconfirmed

8.5
8.6
Figure 8:
Datasheet
30
• Factory Programming with
• Complete write/Erase Protection when
• Low Voltage and Factory Programming
V
Example VPP Supply Connections
PP
=V
program operation that is running during an erase suspend can be suspended to
perform a read operation (see
page
When a programming operation is executing, issuing the Program Suspend command
requests the WSM to suspend the programming algorithm at predetermined points. The
device continues to output Status Register data after the Program Suspend command is
issued. Programming is suspended when Status Register bits SR[7,2] are set. Suspend
latency is specified in
To read data from the device, the Read Array command must be issued. Read Array,
Read Status Register, Read Device Identifier, Read CFI, and Program Resume are valid
commands during a program suspend.
During a program suspend, deasserting CE# places the device in standby, reducing
active current. VPP must remain at its programming level, and WP# must remain
unchanged while in program suspend. If RST# is asserted, the device is reset.
Program Resume
The Resume command instructs the device to continue programming, and
automatically clears Status Register bits SR[7,2]. This command can be written to any
address. If error bits are set, the Status Register should be cleared before issuing the
next instruction. RST# must remain deasserted (see
Resume Flowchart” on page
Program Protection
When VPP = V
VPP is at or below V
level error. Block lock registers are not affected by the voltage level on VPP; they may
still be programmed and read, even if VPP is less than V
V
V
V
PP
CC
CC
PPH
75).
≤ 10K Ω
IL
, absolute hardware write protection is provided for all device blocks. If
V
PP
PPLK
= V
Section 15.5, “Program and Erase Characteristics” on page
, programming operations halt and SR.3 is set indicating a VPP-
PPH
VCC
VPP
VCC
VPP
V
PP
75).
≤ V
Figure 31, “Program Suspend/Resume Flowchart” on
PPLK
PROT #
V
• Low Voltage Programming Only
• Full Device Protection Unavailable
V
• Low-voltage Programming only
• Logic Control of Device Protection
CC
CC
Figure 31, “Program Suspend/
PPLK
.
VCC
VPP
VCC
VPP
Order Number: 208043-05
P33-65nm
Apr 2010
61.