ISP1507B1HNTM STEricsson, ISP1507B1HNTM Datasheet - Page 8

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ISP1507B1HNTM

Manufacturer Part Number
ISP1507B1HNTM
Description
Manufacturer
STEricsson
Datasheet

Specifications of ISP1507B1HNTM

Lead Free Status / RoHS Status
Compliant

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8. Functional description
CD00269905
Product data sheet
8.1 ULPI interface controller
8.2 USB data serializer and deserializer
8.3 Hi-Speed USB (USB 2.0) ATX
The ISP1507x1 provides a 12-pin interface that is compliant with UTMI+ Low Pin Interface
(ULPI) Specification Rev. 1.1. This interface must be connected to the USB link.
The ULPI interface controller provides the following functions:
For more information on the ULPI protocol, see
The USB data serializer prepares data to transmit on the USB bus. To transmit data, the
USB link sends a transmit command and data on the ULPI bus. The serializer performs
parallel-to-serial conversion, bit stuffing, and NRZI encoding. For packets with a PID, the
serializer adds a SYNC pattern to the start of the packet, and an EOP pattern to the end of
the packet. When the serializer is busy and cannot accept any more data, the ULPI
interface controller deasserts NXT.
The USB data deserializer decodes data received from the USB bus. When data is
received, the deserializer strips the SYNC and EOP patterns, and then performs
serial-to-parallel conversion, NRZI decoding, and discarding of stuff bits on the data
payload. The ULPI interface controller sends data to the USB link by asserting DIR, and
then asserting NXT whenever a byte is ready. The deserializer also detects various
receive errors, including bit stuff errors, elasticity buffer underrun or overrun, and
byte-alignment errors.
The Hi-Speed USB ATX block is an analog front-end containing the circuitry needed to
transmit, receive, and terminate the USB bus in high-speed, full-speed, and low-speed, for
USB peripheral, host, and OTG implementations. The following circuitry is included:
ULPI-compliant interface and register set
Allows full control over the USB peripheral, host, and OTG functionality
Parses USB transmit and receive data
Prioritizes USB receive data, USB transmit data, interrupts, and register operations
Low-power mode
V
6-pin serial mode and 3-pin serial mode
Generates RXCMDs; status updates
Maskable interrupts
Control over the ULPI bus state, allowing pins to 3-state or attach active weak
pull-down resistors
Differential drivers to transmit data at high-speed, full-speed, and low-speed
Differential and single-ended receivers to receive data at high-speed, full-speed, and
low-speed
BUS
monitoring, charging, and discharging
Rev. 03 — 26 July 2010
ISP1507A1; ISP1507B1
Section
10.
ULPI HS USB OTG transceiver
© ST-ERICSSON 2010. All rights reserved.
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