ISP1507B1HNTM STEricsson, ISP1507B1HNTM Datasheet - Page 37

• Manufacturer Part Number: ISP1507B1HNTM
• Manufacturer: STEricsson

Specifications of ISP1507B1HNTM

• Lead Free Status / RoHS Status: Compliant

CD00269905
Product data sheet
10.10.1 Full-speed or low-speed host-initiated suspend and resume
10.10 USB suspend and resume
preamble mode, the ISP1507x1 operates just as in full-speed mode, and sends all data
with the full-speed rise time and fall time. Whenever the link transmits a USB packet in
preamble mode, the ISP1507x1 will automatically send a preamble header at full-speed
bit rate before sending the link packet at low-speed bit rate. The ISP1507x1 will ensure a
minimum gap of four full-speed bit times between the last bit of the full-speed PRE PID
and the first bit of the low-speed packet SYNC. The ISP1507x1 will drive a J for at least
one full-speed bit time after sending the PRE PID, after which the pull-up resistor can hold
the J state on the bus. An example transmit packet is shown in
In preamble mode, the ISP1507x1 can also receive low-speed packets from the full-speed
bus.
Figure 16
suspend and sometime later initiates resume signaling to wake up the downstream
peripheral. Note that
LINESTATE updates.
The sequence of events for a host and a peripheral, both with ISP1507x1, is as follows:
1. Idle: Initially, the host and the peripheral are idle. The host has its 15 kΩ pull-down
2. Suspend: When the peripheral sees no bus activity for 3 ms, it enters the suspend
Fig 15. Preamble sequence
DATA[7:0]
resistors enabled (DP_PULLDOWN and DM_PULLDOWN are set to 1b) and 45 Ω
terminations disabled (TERMSELECT is set to 1b). The peripheral has the 1.5 kΩ
pull-up resistor connected to DP for full-speed or DM for low-speed (TERMSELECT is
set to 1b).
state. The peripheral link places the PHY into low-power mode by clearing the
SUSPENDM bit in the FUNC_CTRL register (see
draw only suspend current. The host may or may not be powered down.
DP or DM
CLOCK
NXT
STP
DIR
DP and DM timing is not to scale.
illustrates how a host or a hub places a full-speed or low-speed peripheral into
Figure 16
FS SYNC
Rev. 03 — 26 July 2010
TXCMD (low-speed packet ID)
timing is not to scale, and does not show all RXCMD
PRE ID
FS
IDLE (min
4 FS bits)
ISP1507A1; ISP1507B1
LS SYNC
Section
D0
ULPI HS USB OTG transceiver
LS PID
11.1.2), causing the PHY to
Figure
D1
LS D0
© ST-ERICSSON 2010. All rights reserved.
15.
LS D1
004aaa714
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