ISP1507B1HNTM STEricsson, ISP1507B1HNTM Datasheet - Page 16

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ISP1507B1HNTM

Manufacturer Part Number
ISP1507B1HNTM
Description
Manufacturer
STEricsson
Datasheet

Specifications of ISP1507B1HNTM

Lead Free Status / RoHS Status
Compliant

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0
Table 5.
CD00269905
Product data sheet
Signal
LINESTATE0
LINESTATE1
Signal mapping during low-power mode
9.1.2 Low-power mode
Maps to
DATA0
DATA1
Table 4.
When the USB is idle, the link can place the ISP1507x1 into low-power mode (also called
suspend mode). In low-power mode, the data bus definition changes to that shown in
Table
register (see
signal. The ISP1507x1 will draw only suspend current from the V
During low-power mode, the clock on XTAL1 may be stopped. The clock must be started
again before asserting STP to exit low-power mode. After exiting low-power mode, the
ISP1507x1 will send an RXCMD to the link if a change was detected in any interrupt
source, and the change still exists. An RXCMD may not be sent if the interrupt condition is
removed before exiting.
For more information on low-power mode enter and exit protocols, refer to UTMI+ Low Pin
Interface (ULPI) Specification Rev. 1.1.
Signal
name
DIR
STP
NXT
5. To enter low-power mode, the link sets the SUSPENDM bit in the FUNC_CTRL
Direction
O
O
ULPI signal description
Direction on
ISP1507x1
O
I
O
Section
[1]
11.1.2) to logic 0. To exit low-power mode, the link asserts the STP
Description
combinatorial LINESTATE0 directly driven by the analog receiver
combinatorial LINESTATE1 directly driven by the analog receiver
Rev. 03 — 26 July 2010
Signal description
Direction: Controls the direction of data bus DATA[7:0]. In
synchronous mode, the ISP1507x1 drives DIR to LOW by default,
making the data bus an input so that the ISP1507x1 can listen for
TXCMDs from the link. The ISP1507x1 drives DIR to HIGH only when
it has data for the link. When DIR and NXT are HIGH, the byte on the
data bus contains decoded USB data. When DIR is HIGH and NXT is
LOW, the byte contains status information called RXCMD (receive
command). The only exception to this rule is when the PHY returns
register read data, where NXT is also LOW, replacing the usual
RXCMD byte. Every change in DIR causes a turnaround cycle on the
data bus, during which DATA[7:0] is not valid and must be ignored by
the link.
DIR is always asserted during low-power and serial modes.
Stop: In synchronous mode, the link drives STP to HIGH for one cycle
after the last byte of data is sent to the ISP1507x1. The link can
optionally assert STP to force DIR to be deasserted.
In low-power and serial modes, the link holds STP at HIGH to wake up
the ISP1507x1, causing the ULPI bus to return to synchronous mode.
Next: In synchronous mode, the ISP1507x1 drives NXT to HIGH to
throttle data. If DIR is LOW, the ISP1507x1 asserts NXT to notify the
link to place the next data byte on DATA[7:0] in the following clock
cycle. If DIR is HIGH, the ISP1507x1 asserts NXT to notify the link that
a valid USB data byte is on DATA[7:0] in the current cycle. The
ISP1507x1 always drives an RXCMD when DIR is HIGH and NXT is
LOW, unless register read data is to be returned to the link in the
current cycle.
NXT is not used in low-power or serial mode.
…continued
ISP1507A1; ISP1507B1
ULPI HS USB OTG transceiver
CC
supply (see
© ST-ERICSSON 2010. All rights reserved.
Table
16 of 78
46).

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