ISP1507B1HNTM STEricsson, ISP1507B1HNTM Datasheet - Page 26
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ISP1507B1HNTM
Manufacturer Part Number
ISP1507B1HNTM
Description
Manufacturer
STEricsson
Datasheet
1.ISP1507B1HNTM.pdf
(78 pages)
Specifications of ISP1507B1HNTM
Lead Free Status / RoHS Status
Compliant
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Table 11.
CD00269905
Product data sheet
Table 10.
Command
type name
Register
write
Register read 11b
DATA
1 to 0
3 to 2
5 to 4
6
7
Name
LINESTATE
V
RxEvent
ID
ALT_INT
BUS
TXCMD byte format
RXCMD byte format
10.5.2 RXCMD
Command code
DATA[7:6]
10b
state
Description and value
LINESTATE signals: For a definition of LINESTATE, see
DATA0 — LINESTATE[0]
DATA1 — LINESTATE[1]
Encoded V
Encoded USB event signals: For an explanation of RxEvent, see
Set to the value of the ID pin.
By default, this signal is not used and is not needed in typical designs. Optionally, the link can
enable the BVALID_RISE bit, the BVALID_FALL bit, or both in the PWR_CTRL register (see
Section
with the ALT_INT bit asserted.
The ISP1507x1 communicates status information to the link by asserting DIR and sending
an RXCMD byte on the data bus. The RXCMD data byte format is given in
The ISP1507x1 will automatically send an RXCMD whenever there is a change in any of
the RXCMD data fields. The link must be able to accept an RXCMD at any time; including
single RXCMDs, back-to-back RXCMDs, and RXCMDs at any time during USB receive
packets when NXT is LOW. An example is shown in
refer to UTMI+ Low Pin Interface (ULPI) Specification Rev. 1.1.
An RXCMD may not be sent when exiting low-power mode or serial mode, if the interrupt
condition is removed before exiting.
11.1.14). Corresponding changes in BVALID will cause an RXCMD to be sent to the link
…continued
Command payload
DATA[5:0]
10 1111b
XX XXXXb
10 1111b
XX XXXXb
BUS
voltage state: For an explanation of the V
Rev. 03 — 26 July 2010
Command
name
EXTW
REGW
EXTR
REGR
ISP1507A1; ISP1507B1
Command description
Extended register write command (optional). The
8-bit address must be provided after the command is
accepted.
Register write command with 6-bit immediate
address.
Extended register read command (optional). The
8-bit address must be provided after the command is
accepted.
Register read command with 6-bit immediate
address.
Section
BUS
Figure
state, see
ULPI HS USB OTG transceiver
10.5.2.1.
8. For details and diagrams,
Section
Section
10.5.2.4.
© ST-ERICSSON 2010. All rights reserved.
10.5.2.2.
Table
11.
26 of 78