UJA1065 NXP Semiconductors, UJA1065 Datasheet - Page 6

• Manufacturer Part Number: UJA1065
• Manufacturer: NXP Semiconductors

Specifications of UJA1065

• Lead Free Status / RoHS Status: Supplier Unconfirmed

NXP Semiconductors
UJA1065_7
Product data sheet
Table 2.
The exposed die pad at the bottom of the package allows better dissipation of heat from
the SBC via the printed-circuit board. The exposed die pad is not connected to any active
part of the IC and can be left floating, or can be connected to GND for the best EMC
performance.
Symbol
INH/LIMP
SENSE
BAT42
WAKE
n.c.
V2
CANH
CANL
GND
SPLIT
LIN
RTLIN
BAT14
n.c.
SYSINH
V3
Pin description
Pin
17
18
19
20
21
22
23
24
25
26
27
28
29
30
32
31
Description
inhibit/limp-home output (BAT14 related, push-pull, default floating)
local wake-up input (BAT42 related, continuous or cyclic sampling)
not connected
5 V voltage regulator output for CAN; connect a buffer capacitor to this pin
CANH bus line (HIGH in dominant state)
CANL bus line (LOW in dominant state)
ground
CAN-bus common mode stabilization output
LIN-bus line (LOW in dominant state)
LIN-bus termination resistor connection
14 V battery supply input
not connected
system inhibit output (BAT42 related; e.g. for controlling external DC-to-DC
converter)
unregulated 42 V output (BAT42 related; continuous output, or Cyclic mode
synchronized with local wake-up input)
fast battery interrupt / chatter detector input
42 V battery supply input (connect this pin to BAT14 in 14 V applications)
Rev. 07 — 25 February 2010
…continued
High-speed CAN/LIN fail-safe system basis chip
UJA1065
© NXP B.V. 2010. All rights reserved.
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