UJA1065 NXP Semiconductors, UJA1065 Datasheet - Page 31
UJA1065
Manufacturer Part Number
UJA1065
Description
Manufacturer
NXP Semiconductors
Datasheet
1.UJA1065.pdf
(76 pages)
Specifications of UJA1065
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NXP Semiconductors
Table 6.
UJA1065_7
Product data sheet
Bit
11 to 6
Mode register bit description (bits 11 to 6)
Symbol
NWP[5:0]
Description
Nominal
Watchdog Period
WDPRE = 00 (as
set in the Special
Mode register)
Nominal
Watchdog Period
WDPRE = 01 (as
set in the Special
Mode register)
Nominal
Watchdog Period
WDPRE = 10 (as
set in the Special
Mode register)
Value
00 1001
00 1100
01 0010
01 0100
01 1011
10 0100
10 1101
11 0011
11 0101
11 0110
00 1001
00 1100
01 0010
01 0100
01 1011
10 0100
10 1101
11 0011
11 0101
11 0110
00 1001
00 1100
01 0010
01 0100
01 1011
10 0100
10 1101
11 0011
11 0101
11 0110
Rev. 07 — 25 February 2010
[1]
Time
Normal
mode (ms)
4
8
16
32
40
48
56
64
72
80
6
12
24
48
60
72
84
96
108
120
10
20
40
80
100
120
140
160
180
200
High-speed CAN/LIN fail-safe system basis chip
Standby
mode (ms)
20
40
80
160
320
640
1024
2048
4096
OFF
30
60
120
240
480
960
1536
3072
6144
OFF
50
100
200
400
800
1600
1560
5120
10240
OFF
[2]
[2]
[2]
Flash mode
(ms)
20
40
80
160
320
640
1024
2048
4096
8192
30
60
120
240
480
960
1536
3072
6144
12288
50
100
200
400
800
1600
1560
5120
10240
20480
UJA1065
© NXP B.V. 2010. All rights reserved.
Sleep mode
(ms)
160
320
640
1024
2048
3072
4096
6144
8192
OFF
240
480
960
1536
3072
4608
6144
9216
12288
OFF
400
800
1600
2560
5120
7680
10240
15360
20480
OFF
[3]
[3]
[3]
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