UJA1065 NXP Semiconductors, UJA1065 Datasheet - Page 21

no-image

UJA1065

Manufacturer Part Number
UJA1065
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of UJA1065

Lead Free Status / RoHS Status
Supplier Unconfirmed

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UJA1065/5V0
Manufacturer:
SIPEX
Quantity:
11
Part Number:
UJA1065TW/3V3
Manufacturer:
NXP
Quantity:
4 798
Part Number:
UJA1065TW/3V3
Manufacturer:
PHILIPS/飞利浦
Quantity:
20 000
Part Number:
UJA1065TW/5V0
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Part Number:
UJA1065TW/5V0/C/T
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Part Number:
UJA1065TW/5V0/C/T,
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Part Number:
UJA1065TW/5VO/C/T
Manufacturer:
NXP/恩智浦
Quantity:
20 000
NXP Semiconductors
UJA1065_7
Product data sheet
6.7.1.2 On-line mode
6.7.1.3 On-line Listen mode
6.7.1.4 Off-line mode
6.7.2 CAN wake-up
When leaving Active mode the CAN transmitter is disabled and the CAN receiver is
monitoring the CAN-bus for a valid wake-up. The CAN termination is then working
autonomously.
In On-line mode the CAN-bus pins and pin SPLIT (if enabled) are biased to the normal
levels. The CAN transmitter is deactivated and RXDC reflects the CAN wake-up status. A
CAN wake-up event is signalled to the microcontroller by clearing RXDC.
If the bus stays continuously dominant or recessive for the Off-line time (t
Off-line state will be entered.
On-line Listen mode behaves similar to On-line mode, but all activity on the CAN-bus, with
exception of a special global wake-up request, is ignored. The global wake-up request is
described in
Off-line mode is the low-power mode of the CAN transceiver. The CAN transceiver is
disabled to save supply current and is high-ohmic terminated to ground.
The CAN off-line time is programmable in two steps with the CAN Off-line Timer Control
(COTC) bit. When entering On-line (Listen) mode from Off-line mode the CAN off-line time
is temporarily extended to t
To wake-up the UJA1065 via CAN it has to be distinguished between a conventional
wake-up and a global wake-up in case partial networking is enabled (bit CPNC = 1).
To pass the wake-up filter for a conventional wake-up a dominant, recessive, dominant,
recessive signal on the CAN-bus is needed; see
For a global wake-up out of On-line Listen mode two distinct CAN data patterns are
required:
The second pattern must be received within t
CAN-ID can be used with these data patterns.
If the CAN transceiver enters On-line Listen mode directly from Off-line mode the global
wake-up message is sufficient to wake-up the SBC. This pattern must be received within
t
global wake-up message, then both messages are required for a CAN wake-up.
timeout
In the initial message: C6 - EE - EE - EE - EE - EE - EE - EF (hexadecimal values)
In the global wake-up message: C6 - EE - EE - EE - EE - EE - EE - 37 (hexadecimal
values)
after entering On-line Listen mode. Should t
Section
6.7.2. Pin RXDC is kept HIGH.
Rev. 07 — 25 February 2010
off-line(ext)
.
High-speed CAN/LIN fail-safe system basis chip
timeout
Figure
timeout
after receiving the first pattern. Any
9.
elapse before receiving the
UJA1065
© NXP B.V. 2010. All rights reserved.
off-line
), the
21 of 76

Related parts for UJA1065