UJA1061TW,512 NXP Semiconductors, UJA1061TW,512 Datasheet - Page 45

• Manufacturer Part Number: UJA1061TW,512
• Manufacturer: NXP Semiconductors

Specifications of UJA1061TW,512

• Number Of Transceivers: 1
• Power Down Mode: Sleep/Standby
• Operating Supply Voltage (min): 5.5V
• Operating Temperature (max): 125C
• Operating Temperature (min): -40C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

NXP Semiconductors
7. Limiting values
Table 25.
In accordance with the Absolute Maximum Rating System (IEC 60134). All voltages are referenced to GND.
[1]
[2]
[3]
[4]
[5]
UJA1061_6
Product data sheet
Symbol
V
V
V
V
I
T
T
T
V
WAKE
stg
amb
vj
BAT42
BAT14
DC(n)
trt
esd
Only relevant if V
In accordance with IEC 60747-1. An alternative definition of virtual junction temperature is: T
is a fixed value to be used for the calculation of T
ambient temperature (T
Human Body Model (HBM): C = 100 pF; R = 1.5 kΩ.
ESD performance according to IEC 61000-4-2 (C = 150 pF, R = 330 Ω) of pins CANH, CANL, RTH, RTL, LIN, RTLIN, WAKE, BAT42
and V3 with respect to GND was verified by an external test house. Following results were obtained:
a) equal or better than ±6 kV (unaided).
b) equal or better than ±20 kV (using external ESD protection: NXP Semiconductors PESD1CAN and PESD1LIN diode).
Machine Model (MM): C = 200 pF; L = 0.75 μH; R = 10 Ω.
Limiting values
Parameter
BAT42 supply voltage
BAT14 supply voltage
DC voltages
transient voltage
DC current at pin WAKE
storage temperature
ambient temperature
virtual junction temperature
electrostatic discharge voltage
WAKE
< V
amb
GND
).
− 0.3 V; current will flow into pin GND.
All information provided in this document is subject to legal disclaimers.
Conditions
load dump; t ≤ 500 ms
V
on pins
at pins CANH, CANL and LIN; in
accordance with ISO 7637-3
HBM
MM; at any pin
vj
BAT42
. The rating for T
continuous
load dump; t ≤ 500 ms
V1 and V2
V3 and SYSINH
WAKE
INH/LIMP
CANH, CANL, RTH, RTL LIN and
RTLIN; with respect to any other
pin
TXDC, RXDC, TXDL, RXDL, SDO,
SDI, SCK, SCS, RSTN, INTN and
EN
TEST
at pins CANH, CANL, RTH, RTL,
LIN, RTLIN, WAKE, BAT42, V3;
with respect to GND
at any other pin
Rev. 06 — 9 March 2010
≥ V
BAT14
− 1 V
vj
Fault-tolerant CAN/LIN fail-safe system basis chip
limits the allowable combinations of power dissipation (P
vj
= T
[1]
[2]
[3]
[4]
[5]
amb
Min
−0.3
-
−0.3
-
−0.3
−1.5
−1.5
−0.3
−60
−0.3
−0.3
−150
−15
−55
−40
−40
−8.0
−2.0
−200
+ P
d
× R
th(vj-amb)
Max
+60
60
+33
45
+5.5
V
+60
V
+60
V
+15
+100
-
+150
+125
+150
+8.0
+2.0
+200
UJA1061
BAT42
BAT42
V1
© NXP B.V. 2010. All rights reserved.
+ 0.3
, where R
+ 0.3
+ 0.3
d
) and
45 of 77
th(vj-amb)
Unit
V
V
V
V
V
V
V
V
V
V
V
V
mA
°C
°C
°C
kV
kV
V