UJA1061TW,512 NXP Semiconductors, UJA1061TW,512 Datasheet - Page 36

• Manufacturer Part Number: UJA1061TW,512
• Manufacturer: NXP Semiconductors

Specifications of UJA1061TW,512

• Number Of Transceivers: 1
• Power Down Mode: Sleep/Standby
• Operating Supply Voltage (min): 5.5V
• Operating Temperature (max): 125C
• Operating Temperature (min): -40C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

NXP Semiconductors
Table 10.
UJA1061_6
Product data sheet
Bit
15 and 14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Interrupt register bit description
Symbol
A1, A0
RRS
RO
WTI
OTI
GSI
SPIFI
-
VFI
CANFI
LINFI
WI
WDRI
CANI
LINI
Description
register address
Read Register Select
Read Only
Watchdog Time-out
Interrupt
OverTemperature
Interrupt
Ground Shift Interrupt
SPI clock count Failure
Interrupt
reserved
Voltage Failure Interrupt 1
CAN Failure Interrupt
LIN Failure Interrupt
Wake-up Interrupt
Watchdog Restart
Interrupt
CAN Wake-up Interrupt
LIN Wake-up Interrupt
All information provided in this document is subject to legal disclaimers.
Rev. 06 — 9 March 2010
Value
01
1
0
1
0
1
0
1
0
1
0
0
0
1
0
1
0
1
0
1
0
0
1
0
1
1
Function
read Interrupt register
read the Interrupt register without writing to the Interrupt
Enable register
read the Interrupt register and write to the Interrupt Enable
register
a watchdog overflow during Standby mode has caused an
interrupt (interrupt-based cyclic wake-up feature)
no interrupt
the temperature warning status (TWS) has changed
no interrupt
the ground shift diagnosis bit (GSD) has changed
no interrupt
wrong number of CLK cycles (more than, or less than 16)
during SPI access
no interrupt; SPI access is ignored if the number of CLK
cycles does not equal 16
should always be set to logic 0
V1D, V2D or V3D has been cleared
no interrupt
CAN failure status has changed
no interrupt
LIN failure status has changed
no interrupt
a negative edge at WAKE has been detected
no interrupt
A watchdog restart during watchdog OFF has caused an
interrupt
no interrupt
CAN wake-up event has caused an interrupt
no interrupt
LIN wake-up event has caused an interrupt
no interrupt
Fault-tolerant CAN/LIN fail-safe system basis chip
UJA1061
© NXP B.V. 2010. All rights reserved.
36 of 77