UJA1061TW,512 NXP Semiconductors, UJA1061TW,512 Datasheet - Page 17

• Manufacturer Part Number: UJA1061TW,512
• Manufacturer: NXP Semiconductors

Specifications of UJA1061TW,512

• Number Of Transceivers: 1
• Power Down Mode: Sleep/Standby
• Operating Supply Voltage (min): 5.5V
• Operating Temperature (max): 125C
• Operating Temperature (min): -40C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

NXP Semiconductors
UJA1061_6
Product data sheet
6.6.1.1 SYSINH output
6.6.2.1 Voltage regulator V1
6.5.2 EN output
6.6.1 BAT14, BAT42 and SYSINH
6.6.2 Voltage regulators V1 and V2
6.6 Power supplies
Pin RSTN is monitored for a continuously clamped LOW situation. Once the SBC pulls pin
RSTN HIGH but pin RSTN level remains LOW for longer than t
immediately enters Fail-safe mode since this indicates an application failure.
The SBC also detects if pin RSTN is clamped HIGH. If the HIGH-level remains on the pin
for longer than t
the SBC falls back immediately to Fail-safe mode since the microcontroller cannot be
reset any more. By entering Fail-safe mode, the V1 voltage regulator shuts down and the
microcontroller stops.
Additionally, chattering reset signals are handled by the SBC in such a way that the
system safely falls back to Fail-safe mode with the lowest possible power consumption.
Pin EN can be used to control external hardware such as power components or as a
general purpose output if the system is running properly. During all reset events, when pin
RSTN is pulled LOW, the EN control bit will be cleared, pin EN will be pulled LOW and will
stay LOW after pin RSTN is released. In Normal mode and Flash mode of the SBC, the
microcontroller can set the EN control bit via the SPI. This results in releasing pin EN
which then returns to a HIGH-level.
The SBC has two supply pins, pin BAT42 and pin BAT14. Pin BAT42 supplies most of the
SBC where pin BAT14 only supplies the linear voltage regulators and the INH/LIMP output
pin. This supply architecture allows different supply strategies including the use of
external DC-to-DC converters controlled by the pin SYSINH.
The SYSINH output is a high-side switch from BAT42. It is activated whenever the SBC
requires supply voltage to pin BAT14, e.g. when V1 or V2 is on (see
Figure
external step-down voltage regulator to pin BAT14, to reduce power consumption in
low-power modes.
The UJA1061 has two independent voltage regulators supplied out of the BAT14 pin.
Regulator V1 is intended to supply the microcontroller. Regulator V2 is reserved for the
CAN transceiver.
The V1 voltage is continuously monitored to provide the system reset signal when
undervoltage situations occur. Whenever the V1 voltage falls below one of the three
programmable thresholds, a hardware reset is forced.
A dedicated V1 supply comparator (V1 Monitor) observes V1 for undervoltage events
lower than V
case one of the lower V1 undervoltage reset thresholds is selected.
8). Otherwise pin SYSINH is floating. Pin SYSINH can be used to control e.g. an
UV(VFI)
All information provided in this document is subject to legal disclaimers.
RSTN(CHT)
. This allows the application to receive a supply warning interrupt in
Rev. 06 — 9 March 2010
while pin RSTN is driven internally to a LOW-level by the SBC,
Fault-tolerant CAN/LIN fail-safe system basis chip
RSTN(CLT)
Figure 3
UJA1061
© NXP B.V. 2010. All rights reserved.
, the SBC
and
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