UJA1061TW,512 NXP Semiconductors, UJA1061TW,512 Datasheet - Page 25

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UJA1061TW,512

Manufacturer Part Number
UJA1061TW,512
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of UJA1061TW,512

Number Of Transceivers
1
Power Down Mode
Sleep/Standby
Operating Supply Voltage (min)
5.5V
Operating Temperature (max)
125C
Operating Temperature (min)
-40C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
NXP Semiconductors
UJA1061_6
Product data sheet
Fig 11. States of the RTLIN pin
6.8.6.1 TXDL dominant clamping
6.8.6.2 LIN dominant clamping
6.8.4 LIN slope control
6.8.5 LIN driver capability
6.8.6 Bus and TXDL failure detection
supplied directly
RTLIN = ON
out of BAT42
mode change to Active mode
The LSC bit in the Physical Layer Control register offers a choice between two LIN slope
times, allowing communication up to 20 kbit/s (normal) or up to 10.4 kbit/s (low slope).
Setting the LDC bit in the Physical Layer Control register will increase the driver capability
of the LIN output stage. This feature is used in auto-addressing systems, where the
standard LIN 2.0 drive capability is insufficient.
The SBC handles and reports the following LIN-bus related failures:
These failure events force an interrupt to the microcontroller whenever the status changes
and the corresponding interrupt is enabled.
If the TXDL pin is clamped dominant for longer than t
disabled. After the TXDL pin becomes recessive the transmitter is reactivated
automatically when detecting bus activity or manually by setting and clearing the LTC bit.
When the LIN-bus is clamped dominant for longer than t
t
TXDL(dom)(dis)
LIN-bus shorted to ground
LIN-bus shorted to V
TXDL clamped dominant; the transmitter is disabled
power-on
), the state of the LIN termination is changed according to
Active mode and receiver recessive > t
Active mode and receiver dominant > t
All information provided in this document is subject to legal disclaimers.
OR mode change to Active mode
Rev. 06 — 9 March 2010
BAT14
OR Off-line mode
RTLIN = OFF
or V
AND receiver recessive > t
BAT42
Fault-tolerant CAN/LIN fail-safe system basis chip
; the transmitter is disabled
Off-line mode
LIN(dom)(det)
LIN(dom)(rec)
AND receiver dominant > t
LIN(dom)(rec)
Off-line mode
TXDL(dom)(dis)
LIN(dom)(det)
001aad183
RTLIN = 75 μA
supplied directly
LIN(dom)(det)
out of BAT42
the LIN transmitter is
(which is longer than
UJA1061
Figure
© NXP B.V. 2010. All rights reserved.
11.
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