UJA1061TW,512 NXP Semiconductors, UJA1061TW,512 Datasheet - Page 22

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UJA1061TW,512

Manufacturer Part Number
UJA1061TW,512
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of UJA1061TW,512

Number Of Transceivers
1
Power Down Mode
Sleep/Standby
Operating Supply Voltage (min)
5.5V
Operating Temperature (max)
125C
Operating Temperature (min)
-40C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
NXP Semiconductors
UJA1061_6
Product data sheet
6.7.4.1 TXDC dominant clamping
6.7.4.2 RXDC recessive clamping
6.7.4 Bus, RXD and TXD failure detection
between (reverse supply protection) while pin CANL becomes terminated to pin BAT42
(via pin RTH and pin RTL). If pin V2 is disabled due to an overload condition RTH and
RTL become floating.
The UJA1061 can distinguish between bus, RXD and TXD failures as indicated in
All failures are signalled separately in the CANFD bits in the System Diagnosis register.
Any change (detection and recovery) forces an interrupt to the microcontroller, if this
interrupt is enabled.
Table 3.
[1]
If the TXDC pin is clamped dominant for longer than t
disabled. After the TXDC pin becomes recessive the transmitter is reactivated
automatically when detecting bus activity or manually by setting and clearing the CTC bit.
If the RXDC pin is clamped recessive while the CAN bus is dominant the CAN transmitter
is disabled. The transmitter is reactivated automatically when RXDC becomes dominant
or manually by setting and clearing the CTC bit.
Failure
HxVCC
HxBAT
HxGND
LxBAT
LxGND
LxVCC
HxL
H//
L//
Bus Dom
Bus Rec
TxDC Dom
RxDC Rec
RxDC Dom
CANL stays active with weak short-circuits to BAT due to wake-up requirements within large networks.
CAN-bus, RXD and TXD failure detection
Description
CANH to V
CANH to BAT (14 V and 42 V) short-circuit
CANH to GND short-circuit
CANL to BAT (14 V and 42 V) short-circuit
CANL to GND short-circuit
CANL to V
CANH to CANL short-circuit
CANH interrupted
CANL interrupted
bus is continuously clamped dominant
(double failure); even within Single-wire
mode the receiver remains dominant
bus is continuously clamped recessive
(double failure); driving messages to the bus
is not possible even while the driver is active
pin TXDC is continuously clamped dominant
(handles also RXDC to TXDC short-circuits)
pin RXDC is continuously clamped recessive transmitter disabled but no change in
pin RXDC is continuously clamped dominant none
All information provided in this document is subject to legal disclaimers.
CC
CC
Rev. 06 — 9 March 2010
(5 V) short-circuit
(5 V) short-circuit
Fault-tolerant CAN/LIN fail-safe system basis chip
TXDC(dom)
none
CANL off, weak RTL
CANL off, weak RTL
none
none
Driver and biasing circuit
disabling
CANH off, weak RTH
CANH off, weak RTH
CANL off, weak RTL
none
CANL off, weak RTL
none
transmitter disabled but no change in
biasing
biasing
the CAN transmitter is
UJA1061
© NXP B.V. 2010. All rights reserved.
[1]
Table
22 of 77
3.

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