DEMO9S08LIN Freescale, DEMO9S08LIN Datasheet - Page 78

• Manufacturer Part Number: DEMO9S08LIN
• Manufacturer: Freescale

Specifications of DEMO9S08LIN

• Lead Free Status / RoHS Status: Compliant

Chapter 5 Resets, Interrupts, and System Configuration
5.8.9
This register is used to configure the stop mode behavior of the MCU. For more information concerning
partial power down mode, see
1 This bit can be written only one time after reset. Additional writes are ignored.
78
Reset
PPDACK
PPDC
PPDF
Field
PDC
PDF
W
4
3
2
1
0
R
System Power Management Status and Control 2 Register (SPMSC2)
Figure 5-11. System Power Management Status and Control 2 Register (SPMSC2)
Power Down Flag — This read-only status bit indicates the MCU has recovered from stop1 mode.
0 MCU has not recovered from stop1 mode.
1 MCU recovered from stop1 mode.
Partial Power Down Flag — The PPDF bit indicates that the MCU has exited the stop2 mode.
0 Not stop2 mode recovery.
1 Stop2 mode recovery.
Partial Power Down Acknowledge — Writing a 1 to PPDACK clears the PPDF bit.
Power Down Control — The write-once PDC bit controls entry into the power down (stop2 and stop1) modes.
0 Power down modes are disabled.
1 Power down modes are enabled.
Partial Power Down Control — The write-once PPDC bit controls which power down mode, stop1 or stop2, is
selected.
0 Stop1, full power down, mode enabled if PDC set.
1 Stop2, partial power down, mode enabled if PDC set.
0
7
0
= Unimplemented or Reserved
0
6
0
MC9S08LC60 Series Data Sheet: Technical Data, Rev. 4
Section 3.6, “Stop
Table 5-13. SPMSC2 Field Descriptions
0
5
0
PDF
Modes.”
0
4
Description
PPDF
0
3
PPDACK
0
0
2
Freescale Semiconductor
PDC
1
0
1
PPDC
0
0
1