DEMO9S08LIN Freescale, DEMO9S08LIN Datasheet - Page 276

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DEMO9S08LIN

Manufacturer Part Number
DEMO9S08LIN
Description
Manufacturer
Freescale
Datasheet

Specifications of DEMO9S08LIN

Lead Free Status / RoHS Status
Compliant
Chapter 15 Analog-to-Digital Converter (S08ADC12V1)
15.3.5
In 12-bit mode, the ADCCVH register holds the upper four bits of the 12-bit compare value. These bits are
compared to the upper four bits of the result following a conversion in 12-bit mode when the compare
function is enabled.
In 10-bit mode, the ADCCVH register holds the upper two bits of the 10-bit compare value (ADCV9 –
ADCV8). These bits are compared to the upper two bits of the result following a conversion in 10-bit mode
when the compare function is enabled.
In 8-bit mode, ADCCVH is not used during compare.
15.3.6
This register holds the lower 8 bits of the 12-bit or 10-bit compare value, or all 8 bits of the 8-bit compare
value. Bits ADCV7:ADCV0 are compared to the lower 8 bits of the result following a conversion in 12-bit,
10-bit or 8-bit mode.
15.3.7
ADCCFG is used to select the mode of operation, clock source, clock divide, and configure for low power
or long sample time.
276
Reset:
Reset:
Reset:
W
W
W
R
R
R
Compare Value High Register (ADCCVH)
Compare Value Low Register (ADCCVL)
Configuration Register (ADCCFG)
ADCV7
ADR7
7
0
7
0
0
7
0
= Unimplemented or Reserved
= Unimplemented or Reserved
Figure 15-8. Compare Value High Register (ADCCVH)
ADCV6
Figure 15-9. Compare Value Low Register(ADCCVL)
ADR6
MC9S08LC60 Series Data Sheet: Technical Data, Rev. 4
Figure 15-7. Data Result Low Register (ADCRL)
0
0
0
0
6
6
6
ADCV5
ADR5
0
0
0
0
5
5
5
ADCV4
ADR4
0
0
0
0
4
4
4
ADCV11
ADCV3
ADR3
0
0
0
3
3
3
ADCV10
ADCV2
ADR2
0
0
0
2
2
2
ADCV9
ADCV1
ADR1
Freescale Semiconductor
0
0
0
1
1
1
ADCV8
ADCV0
ADR0
0
0
0
0
0
0