HC230F1020 Altera, HC230F1020 Datasheet - Page 37

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HC230F1020

Manufacturer Part Number
HC230F1020
Description
Manufacturer
Altera
Datasheet

Specifications of HC230F1020

Lead Free Status / RoHS Status
Not Compliant

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IEEE Std. 1149.1
(JTAG)
Boundary-Scan
Support
Altera Corporation
September 2008
H51017-2.4
All HardCopy
(JTAG) boundary-scan test (BST) circuitry that complies with the IEEE
Std. 1149.1-1990 specification. The BST architecture offers the capability
to efficiently test components on printed circuit boards (PCBs) with tight
lead spacing by testing pin connections, without using physical test
probes, and capturing functional data while a device is in normal
operation. Boundary-scan cells in a device can force signals onto pins, or
capture data from pin or core logic signals. Forced test data is serially
shifted into the boundary-scan cells. Captured data is serially shifted out
and externally compared to expected results.
A device using the JTAG interface uses four required pins, TDI, TDO, TMS,
and TCK, and one optional pin, TRST. The TCK pin has an internal weak
pull-down resistor, while the TDI, TMS, and TRST pins have weak
internal pull-up resistors. The TDO output is powered by V
HardCopy II devices support the JTAG instructions shown in
SAMPLE/PRELOAD
EXTEST
BYPASS
Table 3–1. HardCopy II JTAG Instructions (Part 1 of 2)
JTAG Instruction
(1)
®
II structured ASICs provide Joint Test Action Group
3. Boundary-Scan Support
00 0000 0101
00 0000 1111
11 1111 1111
Instruction Code
Allows a snapshot of signals at the
device pins to be captured and
examined during normal device
operation, and permits an initial data
pattern to be output at the device
pins.
Allows the external circuitry and
board-level interconnects to be
tested by forcing a test pattern at the
output pins and capturing test results
at the input pins.
Places the 1-bit
between the
which allows the BST data to pass
synchronously through selected
devices to adjacent devices during
normal device operation.
Description
TDI
BYPASS
and
CCIO
TDO
Preliminary
Table
register
.
pins,
3–1.
3–1

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