DS3102GN Maxim Integrated Products, DS3102GN Datasheet - Page 2

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DS3102GN

Manufacturer Part Number
DS3102GN
Description
Timers & Support Products Stratum 3 Timing Car d IC SEC-EEC Timing
Manufacturer
Maxim Integrated Products
Datasheet

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19-4617; Rev 5; 8/10
____________________________________________________________________________________________ DS3102
5.1
5.2
5.3
5.4
5.5
5.6
5.7
7.1
7.2
7.3
7.4
7.5
7.6
7.7
7.8
7.4.1
7.4.2
7.5.1
7.5.2
7.5.3
7.6.1
7.6.2
7.6.3
7.6.4
7.6.5
7.6.6
7.6.7
7.7.1
7.7.2
7.7.3
7.7.4
7.7.5
7.7.6
7.7.7
7.7.8
7.7.9
7.7.10
7.7.11
7.7.12
7.7.13
7.8.1
7.8.2
STANDARDS COMPLIANCE ..........................................................................................................6
APPLICATION EXAMPLE ...............................................................................................................7
BLOCK DIAGRAM ...........................................................................................................................8
DETAILED DESCRIPTION ..............................................................................................................9
DETAILED FEATURES .................................................................................................................11
PIN DESCRIPTIONS ......................................................................................................................13
FUNCTIONAL DESCRIPTION .......................................................................................................17
I
T0 DPLL F
T4 DPLL F
O
O
R
G
O
D
L
I
I
I
DPLL A
O
NPUT
NPUT
NPUT
NPUT
OCAL
EDUNDANCY
EVICE
UTPUT
UTPUT
ENERAL
VERVIEW
UTPUT
Signal Format Configuration ................................................................................................................ 19
Frequency Configuration...................................................................................................................... 20
Frequency Monitoring .......................................................................................................................... 21
Activity Monitoring ................................................................................................................................ 21
Selected Reference Activity Monitoring ............................................................................................... 22
Priority Configuration............................................................................................................................ 23
Automatic Selection Algorithm ............................................................................................................. 23
Forced Selection .................................................................................................................................. 24
Ultra-Fast Reference Switching ........................................................................................................... 24
External Reference Switching Mode.................................................................................................... 24
Output Clock Phase Continuity During Reference Switching .............................................................. 25
Frequency Monitoring Hysteresis Required by Telcordia GR-1244-CORE......................................... 25
T0 DPLL State Machine ....................................................................................................................... 27
T4 DPLL State Machine ....................................................................................................................... 30
Bandwidth ............................................................................................................................................ 32
Damping Factor.................................................................................................................................... 32
Phase Detectors................................................................................................................................... 32
Loss-of-Lock Detection ........................................................................................................................ 33
Phase Build-Out ................................................................................................................................... 34
Input to Output (Manual) Phase Adjustment........................................................................................ 35
Phase Recalibration ............................................................................................................................. 35
Frequency and Phase Measurement................................................................................................... 35
Input Jitter and Wander Tolerance....................................................................................................... 37
Jitter and Wander Transfer .................................................................................................................. 37
Output Jitter and Wander ..................................................................................................................... 38
Signal Format Configuration ................................................................................................................ 39
Frequency Configuration...................................................................................................................... 39
C
C
C
C
O
RCHITECTURE AND
I
LOCK
LOCK
LOCK
LOCK
DENTIFICATION AND
APLL F
C
C
SCILLATOR AND
F
LOCK
LOCK
EATURES
EATURES
....................................................................................................................................17
EATURES
F
C
M
P
F
EATURES
RIORITY
ONFIGURATION
EATURES
ONITORING
F
C
EATURES
EATURES
ONFIGURATION
......................................................................................................................11
......................................................................................................................11
.....................................................................................................................12
, S
M
...............................................................................................................11
..............................................................................................................12
ELECTION
.............................................................................................................12
ASTER
............................................................................................................12
............................................................................................................21
C
P
ONFIGURATION
ROTECTION
......................................................................................................19
...................................................................................................38
C
LOCK
,
AND
C
S
.....................................................................................18
ONFIGURATION
WITCHING
..................................................................................26
....................................................................23
.............................................................18
Table of Contents
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