DS3102GN Maxim Integrated Products, DS3102GN Datasheet - Page 134

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DS3102GN

Manufacturer Part Number
DS3102GN
Description
Timers & Support Products Stratum 3 Timing Car d IC SEC-EEC Timing
Manufacturer
Maxim Integrated Products
Datasheet

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10.4 SPI Interface Timing
Table 10-10. SPI Interface Timing
(V
19-4617; Rev 5; 8/10
____________________________________________________________________________________________ DS3102
SCLK Frequency
SCLK Cycle Time
CS Setup to First SCLK Edge
CS Hold Time After Last SCLK Edge
SCLK High Time
SCLK Low Time
SDI Data Setup Time
SDI Data Hold Time
SDO Enable Time (High-Z to Output Active)
SDO Disable Time (Output Active to High-Z)
SDO Data Valid Time
SDO Data Hold Time After Update SCLK Edge
Note 1:
DD
= 1.8V 10%; V
All timing is specified with 100pF load on all SPI pins.
PARAMETER (Note 1)
DDIO
= 3.3V 5%, T
A
= -40°C to +85°C.) (See
SYMBOL
t
t
t
f
t
t
t
CLKH
t
t
t
CLKL
HDC
t
t
HDO
BUS
CYC
SUC
Figure
SUI
HDI
DIS
EN
DV
10-4.)
MIN
100
15
15
50
50
15
5
0
5
TYP
MAX
25
50
6
134 of 142
UNITS
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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