ADSP-BF514KSWZ-4F4 Analog Devices Inc, ADSP-BF514KSWZ-4F4 Datasheet - Page 52
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ADSP-BF514KSWZ-4F4
Manufacturer Part Number
ADSP-BF514KSWZ-4F4
Description
Low-Pwr BF Proc W/flash & Cnsmr Conctvty
Manufacturer
Analog Devices Inc
Series
Blackfin®r
Type
Fixed Pointr
Datasheets
1.ADSP-BF531SBSTZ400.pdf
(12 pages)
2.ADSP-BF512KSWZ-3.pdf
(68 pages)
3.ADSP-BF514KSWZ-4F4.pdf
(72 pages)
Specifications of ADSP-BF514KSWZ-4F4
Interface
I²C, PPI, RSI, SPI, SPORT, UART/USART
Clock Rate
400MHz
Non-volatile Memory
FLASH (4Mbit)
On-chip Ram
116kB
Voltage - I/o
1.8V, 2.5V, 3.3V
Voltage - Core
1.30V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
176-LQFP Exposed Pad, 176-eLQFP, 176-HLQFP
Architecture
Modified Harvard
Format
Fixed Point
Clock Freq (max)
400MHz
Device Input Clock Speed
400MHz
Ram Size
48KB
Program Memory Size
1024KB
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
176
Package Type
LQFP EP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ADSP-BF514KSWZ-4F4
Manufacturer:
Analog Devices Inc
Quantity:
10 000
ADSP-BF512/BF512F, BF514/BF514F, BF516/BF516F, BF518/BF518F
Table 48. 10/100 Ethernet MAC Controller Timing: RMII Receive Signal
1
Table 49. 10/100 Ethernet MAC Controller Timing: RMII Transmit Signal
1
Parameter
Timing Requirements
t
t
t
t
Parameter
Switching Characteristics
t
t
RMII inputs synchronous to RMII REF_CLK are ERxD1–0, RMII CRS_DV, and ERxER.
RMII outputs synchronous to RMII REF_CLK are ETxD1–0.
EREFCLKF
EREFCLKW
EREFCLKIS
EREFCLKIH
EREFCLKOV
EREFCLKOH
1
1
REF_CLK Frequency (f
EREF_CLK Width (t
Rx Input Valid to RMII REF_CLK Rising Edge (Data In
Setup)
RMII REF_CLK Rising Edge to Rx Input Invalid (Data In
Hold)
RMII REF_CLK Rising Edge to Tx Output Valid (Data Out Valid)
RMII REF_CLK Rising Edge to Tx Output Invalid (Data Out Hold)
RMII_REF_CLK
ETxD1–0
ETxEN
RMII_REF_CLK
EREFCLK
ERxD1–0
ERxDV
ERxER
SCLK
= EREFCLK Period)
= SCLK Frequency)
Figure 34. 10/100 Ethernet MAC Controller Timing: RMII Transmit Signal
Figure 33. 10/100 Ethernet MAC Controller Timing: RMII Receive Signal
t
REFCLKOH
t
REFCLKIS
Rev. A | Page 52 of 72 | August 2010
t
REFCLKOV
t
REFCLKIH
t
REFCLK
t
REFCLKW
Min
None
t
4
2
EREFCLK
x 40% t
1.8V Nominal
t
REFCLK
V
DDEXT
Max
50 + 1%
EREFCLK
x 60%
Min
2
Min
None
t
4
2
EREFCLK
2.5/3.3V Nominal
x 35% t
V
DDEXT
Max
50 + 1%
Max
8.1
EREFCLK
x 65%
Unit
MHz
ns
ns
ns
Unit
ns
ns