ADSP-BF514KSWZ-4F4 Analog Devices Inc, ADSP-BF514KSWZ-4F4 Datasheet - Page 51

• Manufacturer Part Number: ADSP-BF514KSWZ-4F4
• Description: Low-Pwr BF Proc W/flash & Cnsmr Conctvty
• Manufacturer: Analog Devices Inc
• Series: Blackfin®r
• Type: Fixed Pointr

Specifications of ADSP-BF514KSWZ-4F4

• Interface: I²C, PPI, RSI, SPI, SPORT, UART/USART
• Clock Rate: 400MHz
• Non-volatile Memory: FLASH (4Mbit)
• On-chip Ram: 116kB
• Voltage - I/o: 1.8V, 2.5V, 3.3V
• Voltage - Core: 1.30V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 176-LQFP Exposed Pad, 176-eLQFP, 176-HLQFP
• Architecture: Modified Harvard
• Format: Fixed Point
• Clock Freq (max): 400MHz
• Device Input Clock Speed: 400MHz
• Ram Size: 48KB
• Program Memory Size: 1024KB
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 176
• Package Type: LQFP EP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

10/100 Ethernet MAC Controller Timing
Table 46
describe the 10/100 Ethernet MAC Controller operations.
Table 46. 10/100 Ethernet MAC Controller Timing: MII Receive Signal
1
Table 47. 10/100 Ethernet MAC Controller Timing: MII Transmit Signal
1
Parameter
Timing Requirements
t
t
t
t
Parameter
Switching Characteristics
t
t
t
t
MII inputs synchronous to ERxCLK are ERxD3–0, ERxDV, and ERxER.
MII outputs synchronous to ETxCLK are ETxD3–0.
ERXCLKF
ERXCLKW
ERXCLKIS
ERXCLKIH
ETF
ETXCLKW
ETXCLKOV
ETXCLKOH
ADSP-BF512/BF512F, BF514/BF514F, BF516/BF516F, BF518/BF518F
through
1
1
ERxCLK Frequency (f
ERxCLK Width (t
Rx Input Valid to ERxCLK Rising Edge (Data In Setup)
ERxCLK Rising Edge to Rx Input Invalid (Data In Hold)
ETxCLK Frequency (f
ETxCLK Width (t
ETxCLK Rising Edge to Tx Output Valid (Data Out Valid)
ETxCLK Rising Edge to Tx Output Invalid (Data Out Hold) 0
Table 51
ERx_CLK
ERxD3–0
ERxDV
ERxER
and
ETxCLK
ERxCLK
Figure 31
SCLK
SCLK
= ETxCLK Period)
= ERxCLK Period)
MIITxCLK
ETxD3–0
ETxEN
= SCLK Frequency)
= SCLK Frequency)
Figure 32. 10/100 Ethernet MAC Controller Timing: MII Transmit Signal
Figure 31. 10/100 Ethernet MAC Controller Timing: MII Receive Signal
t
through
ERXCLKIS
Figure 36
t
ERXCLKIH
Rev. A | Page 51 of 72 | August 2010
t
t
ERXCLKW
ETXCLKOH
t
ETXCLKW
t
ETXCLKOV
Min
None
t
7.5
7.5
Min
None
t
t
ERxCLK
ETxCLK
ERXCLK
t
ETXCLK
x 40%
x 40%
1.8V Nominal
1.8V Nominal
V
V
DDEXT
DDEXT
Max
25 + 1%
t
20
Max
25 + 1%
t
ETxCLK
ERxCLK
x 60%
x 60%
Min
None
t
7.5
7.5
Min
None
t
0
ERxCLK
ETxCLK
x 35%
x 35%
2.5/3.3V Nominal
2.5/3.3V Nominal
V
V
DDEXT
DDEXT
Max
25 + 1%
t
20
ETxCLK
Max
25 + 1%
t
ERxCLK
x 65%
x 65%
Unit
MHz
ns
ns
ns
Unit
MHz
ns
ns
ns