IPR-SDRAM/HPDDR Altera, IPR-SDRAM/HPDDR Datasheet - Page 14
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IPR-SDRAM/HPDDR
Manufacturer Part Number
IPR-SDRAM/HPDDR
Description
IP CORE Renewal Of IP-SDRAM/HPDDR
Manufacturer
Altera
Datasheet
1.IP-SDRAMHPDDR.pdf
(88 pages)
Specifications of IPR-SDRAM/HPDDR
Software Application
IP CORE, Memory Controllers, SDRAM
Supported Families
Stratix FPGAs, Quartus II
Core Architecture
FPGA
Core Sub-architecture
Arria, Cyclone, Stratix
Rohs Compliant
NA
Lead Free Status / RoHS Status
na
2–2
Select Flow
SOPC Builder Flow
Specify Parameters
DDR and DDR2 SDRAM High-Performance Controller User Guide
f
You can parameterize the DDR and DDR2 SDRAM High-Performance Controller
MegaCore function using either one of the following flows:
■
■
Table 2–1
Table 2–1. Advantages of the Parameterization Flows
The SOPC Builder flow allows you to add the DDR and DDR2 SDRAM High-
Performance Controller MegaCore function directly to a new or existing SOPC
Builder system. You can also easily add other available components to quickly create
an SOPC Builder system with a DDR and DDR2 SDRAM High-Performance
Controller, such as the Nios II processor, external memory controllers, and
scatter/gather DMA controllers. SOPC Builder automatically creates the system
interconnect logic and system simulation environment.
For more information about SOPC Builder, refer to
Handbook. For more information about how to use controllers with SOPC Builder,
refer to
Builder. For more information on the Quartus II software, refer to the Quartus II Help.
To specify DDR and DDR2 SDRAM High-Performance Controller parameters using
the SOPC Builder flow, follow these steps:
1. In the Quartus II software, create a new Quartus II project with the New Project
2. On the Tools menu, click SOPC Builder.
3. For a new system, specify the system name and language.
4. Add DDR or DDR2 SDRAM High-Performance Controller to your system from
5. Specify the required parameters on all pages in the Parameter Settings tab.
■
■
■
SOPC Builder flow
MegaWizard Plug-In Manager flow
Automatically-generated simulation
environment
Create custom components and integrate
them via the component wizard
All components are automatically
interconnected with the Avalon-MM interface
Wizard.
the System Contents tab.
1
AN 517: Using High-Performance DDR, DDR2, and DDR3 SDRAM With SOPC
summarizes the advantages offered by the different parameterization flows.
The DDR or DDR2 SDRAM High-Performance Controller is in the
SDRAM folder under the Memories and Memory Controllers folder.
SOPC Builder Flow
■
■
Design directly from the DDR or DDR2
SDRAM interface to peripheral device or
devices
Achieves higher-frequency operation
MegaWizard Plug-In Manager Flow
volume 4
© March 2009 Altera Corporation
of the Quartus II
Chapter 2: Getting Started
Select Flow