IPR-CIC Altera, IPR-CIC Datasheet - Page 30

• Manufacturer Part Number: IPR-CIC
• Description: IP CORE Renewal Of IP-CIC
• Manufacturer: Altera

Specifications of IPR-CIC

• Software Application: IP CORE, DSP Filters And Transforms
• Supported Families: Arria GX, Cyclone, HardCopy, Stratix, Stratix II
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: na

4–6
Figure 4–7. Single Input Multiple Output Architecture
CIC MegaCore Function User Guide
(A,B,C,D,E,F,G,H)
D
1
Single Input Multiple Output (SIMO)
Single input multiple output (SIMO) is a feature associated with interpolation CIC
filters. In this architecture, all the channel signals presented for filtering come from a
single input interface.
Like the MISO case, it is possible to share the low sampling rate differentiator section
amongst more channels than the higher sampling frequency integrator sections.
Therefore, this architecture features a single instance of the differentiator section, and
multiple parallel instances of the integrator sections.
After processing by the differentiator section, the channel signals are split into
multiple parallel sections for processing in a high sampling frequency by the
integrator sections.
Figure 4–7
total of eight channels.
In this example, the symbols A, B, C, D, E, F, G, H are demultiplexed into four outputs
A, E; B, F; C, G; and D, H.
The required sampling frequency of the output data is such that it is only possible to
time multiplex two channels per bus. Therefore the CIC filter must be configured with
four output interfaces. Because four interfaces are required, the rate change factor
must also be at least four to exploit this architecture, but in this example a rate change
of eight is illustrated.
SIMO architecture is applied when an interpolation filter type is chosen and the
number of interfaces selected in the MegaWizard interface is greater than one.
The total number of input channels must be a multiple of the number of interfaces. To
satisfy this requirement, you may need to either insert dummy channels or use more
than one CIC MegaCore function.
D
shows an example of the SIMO architecture for a CIC filter that processes a
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© December 2010 Altera Corporation
Chapter 4: Functional Description
Cascaded Integrator Comb Filters
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(A,E)
(B,F)
(C,G)
(D,H)