IPR-CIC Altera, IPR-CIC Datasheet - Page 22

• Manufacturer Part Number: IPR-CIC
• Description: IP CORE Renewal Of IP-CIC
• Manufacturer: Altera

Specifications of IPR-CIC

• Software Application: IP CORE, DSP Filters And Transforms
• Supported Families: Arria GX, Cyclone, HardCopy, Stratix, Stratix II
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: na

3–4
Parameter Descriptions
Table 3–3. CIC MegaCore Function Architecture Page (Part 1 of 2)
CIC MegaCore Function User Guide
Target
Filter type
Number of stages
Differential delay
Rate change factor
Enable variable rate
change factor
Number of interfaces
Number of channels per
interface
Integrator data storage
RAM type of integrator
data storage
Differentiator data storage Logic Element, Memory
RAM type of differentiator
data storage
Parameter
3. Use the Parameter Settings: Input/Output Options page to specify the values
Table 3–2. Example Parameters for the CIC MegaCore Function Input/Output Options Tab
This section describes the CIC MegaCore function parameters, which can be set in the
MegaWizard interface (Refer to
Table 3–3
Parameter
Input data width
Full output resolution
Output data width
Output rounding options
Apply Hogenauer pruning across filter stages
listed in
For more information about these parameters, refer to
Refer to
page 1–2
supported devices
Decimator, Interpolator
1–12
1, 2
2–32000
On or Off
1–128
1–1024
Logic Element, Memory
AUTO, M512, M4K,
M9K, M144K, MLAB
AUTO, M512, M4K,
M9K, M144K, MLAB
shows the parameters that can be set in the Architecture page.
Table
Table 1–3 on
Value
for the list of
3–2.
Displays the target device family that you specified when you
created the Quartus II project.
You can select whether to implement a decimator or interpolator.
Specifies the required number of stages.
Specifies the differential delay in cycles.
Specifies the rate change factor.
Turn on to enable a variable rate change factor that can be changed
at runtime. When this option is on, the Rate change factor
parameter is not available but you can specify minimum and
maximum values.
Specifies the number of MISO inputs or SIMO outputs.
Specifies the number of channels per interface.
You can select whether to implement the integrator data storage as
logic elements or memory.
When Memory is selected, you can select the RAM type used for
integrator data storage.
You can select whether to implement the differentiator data storage
as logic elements or memory.
When Memory is selected, you can select the RAM type used for
differentiator data storage.
“Parameter Setting Examples” on page
Value
8
Off
8
Truncation
On
(4)
(4)
(2)
Description
(3)
© December 2010 Altera Corporation
Table 3–4 on page
Chapter 3: Parameter Settings
(1)
Parameter Descriptions
3–1).
(1)
3–5.