IPR-10GETHERNET Altera, IPR-10GETHERNET Datasheet - Page 7

• Manufacturer Part Number: IPR-10GETHERNET
• Description: IP CORE Renewal Of IP-10GETHERNET
• Manufacturer: Altera

Specifications of IPR-10GETHERNET

• Software Application: IP CORE, Interface And Protocols, ETHERNET
• Supported Families: Quartus II
• Features: IEEE 802.3 2005 And 802.1Q Ethernet Standards, Management Data I/O (MDIO) Master Interface
• Core Architecture: FPGA
• Core Sub-architecture: Arria, HardCopy, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: na

© July 2010 Altera Corporation
f
1
The chapter provides step-by-step instructions to help you get started using the
Altera
the 10-Gbps Ethernet IP core.
To use this document, you should already be familiar with the Ethernet protocol in
general and 10-Gbps Ethernet in particular. You should also have some experience
and familiarity with logic design using the Quartus
Refer to the
the Quartus II design flow, including tutorials.
Altera categorizes this IP core as a reference design, described on the Altera website
on the
This document describes the following development flow steps:
1.
2.
3.
4.
Licensing and Installation
a.
b.
c.
IP Core Parameterization
a.
b.
Functional Verification
a.
b.
c.
Implementation and Timing Analysis
a.
b.
c.
®
Free Time-Limited Evaluation Using OpenCore Plus Licensing
Purchasing Full License for System Development
Downloading and Installation
Variation Options
Design Flows
Testbench Files
Testbench Utilities—Tasks and Procedures
Running Tests
Synopsis Design Constraints
Placement Constraints
Timing Verification
10-Gbps Ethernet Reference Design
10-Gbps Ethernet IP core. It shows you how to install, generate, and simulate
Quartus II Development Software Literature
2. Getting Started with the
web page.
®
Getting Started with the 10-Gbps Ethernet IP
10-Gbps Ethernet IP
II software.
page for information about