PIC16F785-E/SS Microchip Technology, PIC16F785-E/SS Datasheet - Page 98

20 PIN, 3.5 KB STD FLASH, 128 RAM, 18 I/O PB FREE,

PIC16F785-E/SS

Manufacturer Part Number
PIC16F785-E/SS
Description
20 PIN, 3.5 KB STD FLASH, 128 RAM, 18 I/O PB FREE,
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F785-E/SS

Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
17
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
20-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT20SS1-1 - SOCKET TRANSITION 20DIP 20SSOPAC162060 - HEADER INTRFC MPLAB ICD2 20PIN
Connectivity
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIC16F785/HV785
REGISTER 13-4:
DS41249E-page 96
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4-0
Note 1: See PWMCON1 register (Register 13-5).
R/W-0
POL
POL: PH2 Output Polarity bit
1 = PH2 Pin is active low
0 = PH2 Pin is active high
C2EN: Comparator 2 Enable bit
When COMOD<1:0> = 00
When COMOD<1:0> = 1X or X1
C1EN: Comparator 1 Enable bit
When COMOD<1:0> = 00
When COMOD<1:0> = 1X or X1
PH<4:0>: PWM Phase bits
When COMOD<1:0> = 00
When COMOD<1:0> = 1X
When COMOD<1:0> = 01
R/W-0
C2EN
1 = PH2 is reset when C2OUT goes high
0 = PH2 ignores Comparator 2
C2EN has no effect
1 = PH2 is reset when C1OUT goes high
0 = PH2 ignores Comparator 1
C1EN has no effect
00000 = PH2 starts 1 pwm_clk period after falling edge of SYNC pulse. All other PH2 delays are
00001 = PH2 is delayed by 1 pwm_clk pulse
••••• = • • •
11111 = PH2 is delayed by 31 pwm_clk pulses
00000 = Complementary drive terminates 1 pwm_clk period after falling edge of SYNC pulse.
00001 = Complementary drive termination is delayed by 1 pwm_clk pulse
••••• = • • •
11111 = Complementary drive termination is delayed by 31 pwm_clk pulses
PH<4:0> has no effect.
PWMPH2: PWM PHASE 2 CONTROL REGISTER
W = Writable bit
‘1’ = Bit is set
expressed relative to this time.
All other PH2 delays are expressed relative to this time.
R/W-0
C1EN
(1)
(1)
(1)
(1)
(1)
R/W-0
(1)
(1)
PH4
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
PH3
R/W-0
PH2
© 2008 Microchip Technology Inc.
x = Bit is unknown
R/W-0
PH1
R/W-0
PH0
bit 0

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