PIC16F785-E/SS Microchip Technology, PIC16F785-E/SS Datasheet - Page 105
![20 PIN, 3.5 KB STD FLASH, 128 RAM, 18 I/O PB FREE,](/photos/6/58/65895/150-20-ssop_sml.jpg)
PIC16F785-E/SS
Manufacturer Part Number
PIC16F785-E/SS
Description
20 PIN, 3.5 KB STD FLASH, 128 RAM, 18 I/O PB FREE,
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F785-ISS.pdf
(206 pages)
3.PIC16F785-ISS.pdf
(10 pages)
4.PIC16F785-ISS.pdf
(28 pages)
Specifications of PIC16F785-E/SS
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
17
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
20-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT20SS1-1 - SOCKET TRANSITION 20DIP 20SSOPAC162060 - HEADER INTRFC MPLAB ICD2 20PIN
Connectivity
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- PIC16F785-ISS PDF datasheet #2
- PIC16F785-ISS PDF datasheet #3
- PIC16F785-ISS PDF datasheet #4
- Current page: 105 of 206
- Download datasheet (4Mb)
14.0
The EEPROM data memory is readable and writable
during normal operation (full V
is not directly mapped in the register file space.
Instead, it is indirectly addressed through the Special
Function Registers. There are four SFRs used to read
and write this memory:
• EECON1
• EECON2 (not a physically implemented register)
• EEDAT
• EEADR
EEDAT holds the 8-bit data for read/write, and EEADR
holds the address of the EEPROM location being
accessed. The PIC16F785/HV785 has 256 bytes of
data EEPROM with an address range from 0h to FFh.
REGISTER 14-1:
REGISTER 14-2:
© 2008 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
EEADR7
EEDAT7
R/W-0
R/W-0
DATA EEPROM MEMORY
EEDATn: Byte Value to Write to or Read From Data EEPROM bits
EEADR: Specifies one of 256 locations for EEPROM Read/Write Operation bits
EEADR6
EEDAT6
R/W-0
R/W-0
EEDAT: EEPROM DATA REGISTER
EEADR: EEPROM ADDRESS REGISTER
DD
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
EEADR5
range). This memory
EEDAT5
R/W-0
R/W-0
EEADR4
EEDAT4
R/W-0
R/W-0
U = Unimplemented bit, read as ‘0’
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
‘0’ = Bit is cleared
EEADR3
EEDAT3
R/W-0
R/W-0
The EEPROM data memory allows byte read and write.
A byte write automatically erases the location and
writes the new data (erase before write). The EEPROM
data memory is rated for high erase/write cycles. The
write time is controlled by an on-chip timer. The write
time will vary with voltage and temperature, as well as
from chip-to-chip. Please refer to AC Specifications in
Section 19.0 “Electrical Specifications” for exact
limits.
When the data memory is code-protected, the CPU
may continue to read and write the data EEPROM
memory. The device programmer can no longer access
the data EEPROM data and will read zeroes.
PIC16F785/HV785
EEADR2
EEDAT2
R/W-0
R/W-0
x = Bit is unknown
x = Bit is unknown
EEADR1
EEDAT1
R/W-0
R/W-0
DS41249E-page 103
EEADR0
EEDAT0
R/W-0
R/W-0
bit 0
bit 0
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