PIC16F785-E/SS Microchip Technology, PIC16F785-E/SS Datasheet - Page 163

20 PIN, 3.5 KB STD FLASH, 128 RAM, 18 I/O PB FREE,

PIC16F785-E/SS

Manufacturer Part Number
PIC16F785-E/SS
Description
20 PIN, 3.5 KB STD FLASH, 128 RAM, 18 I/O PB FREE,
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F785-E/SS

Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
17
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
20-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT20SS1-1 - SOCKET TRANSITION 20DIP 20SSOPAC162060 - HEADER INTRFC MPLAB ICD2 20PIN
Connectivity
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
FIGURE 19-10:
TABLE 19-17: PIC16F785/HV785 A/D CONVERSION REQUIREMENTS (SLEEP MODE)
© 2008 Microchip Technology Inc.
130
131
132
134
Note 1:
Param
No.
Note 1:
A/D DATA
SAMPLE
A/D CLK
2:
BSF ADCON0, GO
ADRES
*
† Data in ‘Typ’ column is at 5.0V, 25°C unless otherwise stated. These parameters are for design guidance
ADIF
GO
These parameters are characterized but not tested.
only and are not tested.
ADRES register may be read on the following T
See Table 12-1 for minimum conditions.
Q4
T
T
T
T
CNV
ACQ
AD
Sym
GO
If the A/D clock source is selected as RC, a time of T
allows the SLEEP instruction to be executed.
134
132
A/D Internal RC
Oscillator Period
Conversion Time
(not including
Acquisition Time)
Acquisition Time
Q4 to A/D Clock
Start
PIC16F785/HV785 A/D CONVERSION TIMING (SLEEP MODE)
Characteristic
(T
OSC
/2 + T
(1)
CY
(Note 2)
9
)
(1)
Min
3.0*
2.0*
5*
OLD_DATA
SAMPLING STOPPED
8
T
OSC
7
Typ†
11.5
131
6.0
4.0
/2 + T
11
CY
cycle.
6
CY
130
CY
Max
9.0*
6.0*
3
is added before the A/D clock starts. This
PIC16F785/HV785
Units
2
T
μs
μs
μs
μs
AD
1
ADCS<1:0> = 11 (RC mode)
At V
At V
The minimum time is the amplifier
settling time. This may be used if
the “new” input voltage has not
changed by more than 1 LSb (i.e.,
4.1 mV @ 4.096V) from the last
sampled voltage (as stored on
C
If the A/D clock source is selected
as RC, a time of T
before the A/D clock starts. This
allows the SLEEP instruction to be
executed.
HOLD
DD
DD
).
0
= 2.5V
= 5.0V
NEW_DATA
Conditions
1 T
DONE
CY
DS41249E-page 161
1 T
CY
CY
is added

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